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39 lines
1.3 KiB
LLVM
39 lines
1.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lsx < %s | FileCheck %s --check-prefix=LA32
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; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s --check-prefix=LA64
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define <4 x float> @insert_bitcast_v4f32(<4 x float> %a, i32 %b) nounwind {
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; LA32-LABEL: insert_bitcast_v4f32:
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; LA32: # %bb.0: # %entry
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; LA32-NEXT: movgr2fr.w $fa1, $a0
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; LA32-NEXT: vextrins.w $vr0, $vr1, 16
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; LA32-NEXT: ret
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;
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; LA64-LABEL: insert_bitcast_v4f32:
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; LA64: # %bb.0: # %entry
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; LA64-NEXT: vinsgr2vr.w $vr0, $a0, 1
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; LA64-NEXT: ret
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entry:
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%c = bitcast i32 %b to float
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%d = insertelement <4 x float> %a, float %c, i32 1
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ret <4 x float> %d
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}
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define <2 x double> @insert_bitcast_v2f64(<2 x double> %a, i64 %b) nounwind {
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; LA32-LABEL: insert_bitcast_v2f64:
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; LA32: # %bb.0: # %entry
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; LA32-NEXT: movgr2fr.w $fa1, $a0
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; LA32-NEXT: movgr2frh.w $fa1, $a1
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; LA32-NEXT: vextrins.d $vr0, $vr1, 16
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; LA32-NEXT: ret
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;
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; LA64-LABEL: insert_bitcast_v2f64:
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; LA64: # %bb.0: # %entry
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; LA64-NEXT: vinsgr2vr.d $vr0, $a0, 1
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; LA64-NEXT: ret
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entry:
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%c = bitcast i64 %b to double
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%d = insertelement <2 x double> %a, double %c, i32 1
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ret <2 x double> %d
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}
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