derek.holloway
7502bf64a4
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40 lines
1.5 KiB
LLVM
40 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lsx < %s | FileCheck %s --check-prefix=LA32
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; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s --check-prefix=LA64
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declare <16 x i8> @llvm.loongarch.lsx.vseq.b(<16 x i8>, <16 x i8>)
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declare <16 x i8> @llvm.loongarch.lsx.vreplgr2vr.b(i32)
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define <16 x i8> @vreplgr2vr() nounwind {
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; LA32-LABEL: vreplgr2vr:
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; LA32: # %bb.0: # %start
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; LA32-NEXT: addi.w $sp, $sp, -16
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; LA32-NEXT: st.w $ra, $sp, 12 # 4-byte Folded Spill
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; LA32-NEXT: move $a0, $zero
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; LA32-NEXT: jirl $ra, $zero, 0
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; LA32-NEXT: vrepli.b $vr0, 0
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; LA32-NEXT: vreplgr2vr.b $vr1, $zero
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; LA32-NEXT: vseq.b $vr0, $vr0, $vr1
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; LA32-NEXT: ld.w $ra, $sp, 12 # 4-byte Folded Reload
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; LA32-NEXT: addi.w $sp, $sp, 16
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; LA32-NEXT: ret
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;
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; LA64-LABEL: vreplgr2vr:
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; LA64: # %bb.0: # %start
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; LA64-NEXT: addi.d $sp, $sp, -16
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; LA64-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
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; LA64-NEXT: move $a0, $zero
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; LA64-NEXT: jirl $ra, $zero, 0
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; LA64-NEXT: vrepli.b $vr0, 0
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; LA64-NEXT: vreplgr2vr.b $vr1, $zero
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; LA64-NEXT: vseq.b $vr0, $vr0, $vr1
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; LA64-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
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; LA64-NEXT: addi.d $sp, $sp, 16
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; LA64-NEXT: ret
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start:
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%tmp = tail call <16 x i8> @llvm.loongarch.lsx.vreplgr2vr.b(i32 0)
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call ptr null(ptr null)
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%res = tail call <16 x i8> @llvm.loongarch.lsx.vseq.b(<16 x i8> zeroinitializer, <16 x i8> %tmp)
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ret <16 x i8> %res
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}
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