derek.holloway
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138 lines
4.2 KiB
LLVM
138 lines
4.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc --mtriple=loongarch64 -mattr=+d,-lsx < %s | FileCheck %s --check-prefix=LA64
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; RUN: llc --mtriple=loongarch32 -mattr=+d < %s | FileCheck %s --check-prefix=LA32
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; RUN: llc --mtriple=loongarch64 -mattr=+d,+lsx < %s | FileCheck %s --check-prefix=LSX
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; RUN: llc --mtriple=loongarch64 -mattr=+d,+lasx < %s | FileCheck %s --check-prefix=LASX
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; ISSUE-186645 - Merge 64-bit operations as 128-bit operations while noimplicitfloat
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; attribute is set are not legal. However, we can generate a paired 64-bit loads and
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; stores, without using floating point registers.
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define void @memcpy16_noimplicitfloat(ptr %p0, ptr %p1) noimplicitfloat {
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; LA64-LABEL: memcpy16_noimplicitfloat:
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; LA64: # %bb.0:
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; LA64-NEXT: ld.d $a2, $a1, 8
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; LA64-NEXT: st.d $a2, $a0, 8
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; LA64-NEXT: ld.d $a1, $a1, 0
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; LA64-NEXT: st.d $a1, $a0, 0
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; LA64-NEXT: ret
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;
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; LA32-LABEL: memcpy16_noimplicitfloat:
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; LA32: # %bb.0:
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; LA32-NEXT: ld.w $a2, $a1, 12
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; LA32-NEXT: st.w $a2, $a0, 12
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; LA32-NEXT: ld.w $a2, $a1, 8
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; LA32-NEXT: st.w $a2, $a0, 8
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; LA32-NEXT: ld.w $a2, $a1, 4
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; LA32-NEXT: st.w $a2, $a0, 4
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; LA32-NEXT: ld.w $a1, $a1, 0
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; LA32-NEXT: st.w $a1, $a0, 0
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; LA32-NEXT: ret
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;
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; LSX-LABEL: memcpy16_noimplicitfloat:
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; LSX: # %bb.0:
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; LSX-NEXT: ld.d $a2, $a1, 8
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; LSX-NEXT: st.d $a2, $a0, 8
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; LSX-NEXT: ld.d $a1, $a1, 0
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; LSX-NEXT: st.d $a1, $a0, 0
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; LSX-NEXT: ret
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;
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; LASX-LABEL: memcpy16_noimplicitfloat:
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; LASX: # %bb.0:
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; LASX-NEXT: ld.d $a2, $a1, 8
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; LASX-NEXT: st.d $a2, $a0, 8
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; LASX-NEXT: ld.d $a1, $a1, 0
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; LASX-NEXT: st.d $a1, $a0, 0
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; LASX-NEXT: ret
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call void @llvm.memcpy.p0.p0.i64(ptr align 4 %p0, ptr align 4 %p1, i64 16, i1 false)
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ret void
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}
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define void @memcpy16_aligned(ptr %p0, ptr %p1) {
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; LA64-LABEL: memcpy16_aligned:
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; LA64: # %bb.0:
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; LA64-NEXT: ld.d $a2, $a1, 8
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; LA64-NEXT: st.d $a2, $a0, 8
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; LA64-NEXT: ld.d $a1, $a1, 0
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; LA64-NEXT: st.d $a1, $a0, 0
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; LA64-NEXT: ret
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;
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; LA32-LABEL: memcpy16_aligned:
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; LA32: # %bb.0:
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; LA32-NEXT: ld.w $a2, $a1, 12
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; LA32-NEXT: st.w $a2, $a0, 12
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; LA32-NEXT: ld.w $a2, $a1, 8
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; LA32-NEXT: st.w $a2, $a0, 8
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; LA32-NEXT: ld.w $a2, $a1, 4
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; LA32-NEXT: st.w $a2, $a0, 4
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; LA32-NEXT: ld.w $a1, $a1, 0
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; LA32-NEXT: st.w $a1, $a0, 0
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; LA32-NEXT: ret
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;
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; LSX-LABEL: memcpy16_aligned:
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; LSX: # %bb.0:
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; LSX-NEXT: vld $vr0, $a1, 0
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; LSX-NEXT: vst $vr0, $a0, 0
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; LSX-NEXT: ret
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;
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; LASX-LABEL: memcpy16_aligned:
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; LASX: # %bb.0:
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; LASX-NEXT: vld $vr0, $a1, 0
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; LASX-NEXT: vst $vr0, $a0, 0
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; LASX-NEXT: ret
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call void @llvm.memcpy.p0.p0.i64(ptr align 4 %p0, ptr align 4 %p1, i64 16, i1 false)
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ret void
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}
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define void @memcpy32_aligned(ptr %p0, ptr %p1) {
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; LA64-LABEL: memcpy32_aligned:
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; LA64: # %bb.0:
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; LA64-NEXT: ld.d $a2, $a1, 24
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; LA64-NEXT: st.d $a2, $a0, 24
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; LA64-NEXT: ld.d $a2, $a1, 16
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; LA64-NEXT: st.d $a2, $a0, 16
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; LA64-NEXT: ld.d $a2, $a1, 8
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; LA64-NEXT: st.d $a2, $a0, 8
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; LA64-NEXT: ld.d $a1, $a1, 0
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; LA64-NEXT: st.d $a1, $a0, 0
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; LA64-NEXT: ret
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;
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; LA32-LABEL: memcpy32_aligned:
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; LA32: # %bb.0:
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; LA32-NEXT: ld.w $a2, $a1, 28
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; LA32-NEXT: st.w $a2, $a0, 28
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; LA32-NEXT: ld.w $a2, $a1, 24
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; LA32-NEXT: st.w $a2, $a0, 24
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; LA32-NEXT: ld.w $a2, $a1, 20
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; LA32-NEXT: st.w $a2, $a0, 20
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; LA32-NEXT: ld.w $a2, $a1, 16
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; LA32-NEXT: st.w $a2, $a0, 16
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; LA32-NEXT: ld.w $a2, $a1, 12
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; LA32-NEXT: st.w $a2, $a0, 12
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; LA32-NEXT: ld.w $a2, $a1, 8
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; LA32-NEXT: st.w $a2, $a0, 8
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; LA32-NEXT: ld.w $a2, $a1, 4
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; LA32-NEXT: st.w $a2, $a0, 4
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; LA32-NEXT: ld.w $a1, $a1, 0
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; LA32-NEXT: st.w $a1, $a0, 0
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; LA32-NEXT: ret
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;
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; LSX-LABEL: memcpy32_aligned:
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; LSX: # %bb.0:
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; LSX-NEXT: vld $vr0, $a1, 16
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; LSX-NEXT: vst $vr0, $a0, 16
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; LSX-NEXT: vld $vr0, $a1, 0
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; LSX-NEXT: vst $vr0, $a0, 0
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; LSX-NEXT: ret
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;
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; LASX-LABEL: memcpy32_aligned:
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; LASX: # %bb.0:
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; LASX-NEXT: xvld $xr0, $a1, 0
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; LASX-NEXT: xvst $xr0, $a0, 0
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; LASX-NEXT: ret
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call void @llvm.memcpy.p0.p0.i64(ptr align 4 %p0, ptr align 4 %p1, i64 32, i1 false)
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ret void
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}
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declare void @llvm.memcpy.p0.p0.i64(ptr, ptr, i64, i1)
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