derek.holloway
7502bf64a4
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52 lines
1.6 KiB
LLVM
52 lines
1.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=m68k-pc-linux -relocation-model=pic -verify-machineinstrs | FileCheck %s
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;
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; Pass first 4 arguments in registers %d0,%d1,%a0,%a1 the rest goes onto stack
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define i32 @foo1() nounwind uwtable {
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; CHECK-LABEL: foo1:
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; CHECK: .cfi_startproc
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; CHECK-NEXT: ; %bb.0: ; %entry
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; CHECK-NEXT: suba.l #4, %sp
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; CHECK-NEXT: .cfi_def_cfa_offset -8
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; CHECK-NEXT: move.l #5, (%sp)
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; CHECK-NEXT: moveq #1, %d0
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; CHECK-NEXT: moveq #2, %d1
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; CHECK-NEXT: move.w #3, %a0
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; CHECK-NEXT: move.w #4, %a1
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; CHECK-NEXT: jsr (bar1@PLT,%pc)
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; CHECK-NEXT: moveq #0, %d0
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; CHECK-NEXT: adda.l #4, %sp
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; CHECK-NEXT: rts
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entry:
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call fastcc void @bar1(i32 1, i32 2, i32 3, i32 4, i32 5) nounwind
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ret i32 0
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}
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declare fastcc void @bar1(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e);
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;
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; Pass pointers in %a registers if there are any free left
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define i32 @foo2() nounwind uwtable {
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; CHECK-LABEL: foo2:
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; CHECK: .cfi_startproc
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; CHECK-NEXT: ; %bb.0: ; %entry
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; CHECK-NEXT: suba.l #12, %sp
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; CHECK-NEXT: .cfi_def_cfa_offset -16
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; CHECK-NEXT: lea (8,%sp), %a0
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; CHECK-NEXT: moveq #2, %d0
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; CHECK-NEXT: lea (4,%sp), %a1
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; CHECK-NEXT: moveq #4, %d1
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; CHECK-NEXT: jsr (bar2@PLT,%pc)
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; CHECK-NEXT: moveq #0, %d0
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; CHECK-NEXT: adda.l #12, %sp
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; CHECK-NEXT: rts
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entry:
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%a = alloca i32, align 4
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%b = alloca i32, align 4
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call fastcc void @bar2(ptr %a, i32 2, ptr %b, i32 4) nounwind
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ret i32 0
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}
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declare fastcc void @bar2(ptr %a, i32 %b, ptr %c, i32 %d);
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