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301 lines
8.1 KiB
YAML
301 lines
8.1 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
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--- |
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define void @eq_i32() {entry: ret void}
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define void @ne_i32() {entry: ret void}
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define void @sgt_i32() {entry: ret void}
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define void @sge_i32() {entry: ret void}
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define void @slt_i32() {entry: ret void}
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define void @sle_i32() {entry: ret void}
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define void @ugt_i32() {entry: ret void}
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define void @uge_i32() {entry: ret void}
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define void @ult_i32() {entry: ret void}
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define void @ule_i32() {entry: ret void}
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define void @eq_ptr() {entry: ret void}
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...
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---
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name: eq_i32
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1
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; MIPS32-LABEL: name: eq_i32
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
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; MIPS32: [[XOR:%[0-9]+]]:gpr32 = XOR [[COPY]], [[COPY1]]
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; MIPS32: [[SLTiu:%[0-9]+]]:gpr32 = SLTiu [[XOR]], 1
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; MIPS32: $v0 = COPY [[SLTiu]]
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; MIPS32: RetRA implicit $v0
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%0:gprb(s32) = COPY $a0
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%1:gprb(s32) = COPY $a1
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%4:gprb(s32) = G_ICMP intpred(eq), %0(s32), %1
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%3:gprb(s32) = COPY %4(s32)
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$v0 = COPY %3(s32)
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RetRA implicit $v0
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...
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---
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name: ne_i32
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1
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; MIPS32-LABEL: name: ne_i32
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
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; MIPS32: [[XOR:%[0-9]+]]:gpr32 = XOR [[COPY]], [[COPY1]]
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; MIPS32: [[SLTu:%[0-9]+]]:gpr32 = SLTu $zero, [[XOR]]
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; MIPS32: $v0 = COPY [[SLTu]]
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; MIPS32: RetRA implicit $v0
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%0:gprb(s32) = COPY $a0
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%1:gprb(s32) = COPY $a1
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%4:gprb(s32) = G_ICMP intpred(ne), %0(s32), %1
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%3:gprb(s32) = COPY %4(s32)
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$v0 = COPY %3(s32)
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RetRA implicit $v0
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...
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---
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name: sgt_i32
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1
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; MIPS32-LABEL: name: sgt_i32
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
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; MIPS32: [[SLT:%[0-9]+]]:gpr32 = SLT [[COPY1]], [[COPY]]
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; MIPS32: $v0 = COPY [[SLT]]
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; MIPS32: RetRA implicit $v0
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%0:gprb(s32) = COPY $a0
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%1:gprb(s32) = COPY $a1
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%4:gprb(s32) = G_ICMP intpred(sgt), %0(s32), %1
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%3:gprb(s32) = COPY %4(s32)
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$v0 = COPY %3(s32)
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RetRA implicit $v0
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...
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---
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name: sge_i32
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1
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; MIPS32-LABEL: name: sge_i32
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
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; MIPS32: [[SLT:%[0-9]+]]:gpr32 = SLT [[COPY]], [[COPY1]]
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; MIPS32: [[XORi:%[0-9]+]]:gpr32 = XORi [[SLT]], 1
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; MIPS32: $v0 = COPY [[XORi]]
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; MIPS32: RetRA implicit $v0
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%0:gprb(s32) = COPY $a0
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%1:gprb(s32) = COPY $a1
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%4:gprb(s32) = G_ICMP intpred(sge), %0(s32), %1
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%3:gprb(s32) = COPY %4(s32)
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$v0 = COPY %3(s32)
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RetRA implicit $v0
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...
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---
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name: slt_i32
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1
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; MIPS32-LABEL: name: slt_i32
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
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; MIPS32: [[SLT:%[0-9]+]]:gpr32 = SLT [[COPY]], [[COPY1]]
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; MIPS32: $v0 = COPY [[SLT]]
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; MIPS32: RetRA implicit $v0
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%0:gprb(s32) = COPY $a0
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%1:gprb(s32) = COPY $a1
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%4:gprb(s32) = G_ICMP intpred(slt), %0(s32), %1
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%3:gprb(s32) = COPY %4(s32)
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$v0 = COPY %3(s32)
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RetRA implicit $v0
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...
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---
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name: sle_i32
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1
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; MIPS32-LABEL: name: sle_i32
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
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; MIPS32: [[SLT:%[0-9]+]]:gpr32 = SLT [[COPY1]], [[COPY]]
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; MIPS32: [[XORi:%[0-9]+]]:gpr32 = XORi [[SLT]], 1
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; MIPS32: $v0 = COPY [[XORi]]
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; MIPS32: RetRA implicit $v0
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%0:gprb(s32) = COPY $a0
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%1:gprb(s32) = COPY $a1
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%4:gprb(s32) = G_ICMP intpred(sle), %0(s32), %1
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%3:gprb(s32) = COPY %4(s32)
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$v0 = COPY %3(s32)
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RetRA implicit $v0
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...
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---
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name: ugt_i32
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1
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; MIPS32-LABEL: name: ugt_i32
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
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; MIPS32: [[SLTu:%[0-9]+]]:gpr32 = SLTu [[COPY1]], [[COPY]]
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; MIPS32: $v0 = COPY [[SLTu]]
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; MIPS32: RetRA implicit $v0
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%0:gprb(s32) = COPY $a0
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%1:gprb(s32) = COPY $a1
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%4:gprb(s32) = G_ICMP intpred(ugt), %0(s32), %1
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%3:gprb(s32) = COPY %4(s32)
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$v0 = COPY %3(s32)
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RetRA implicit $v0
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...
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---
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name: uge_i32
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1
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; MIPS32-LABEL: name: uge_i32
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
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; MIPS32: [[SLTu:%[0-9]+]]:gpr32 = SLTu [[COPY]], [[COPY1]]
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; MIPS32: [[XORi:%[0-9]+]]:gpr32 = XORi [[SLTu]], 1
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; MIPS32: $v0 = COPY [[XORi]]
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; MIPS32: RetRA implicit $v0
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%0:gprb(s32) = COPY $a0
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%1:gprb(s32) = COPY $a1
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%4:gprb(s32) = G_ICMP intpred(uge), %0(s32), %1
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%3:gprb(s32) = COPY %4(s32)
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$v0 = COPY %3(s32)
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RetRA implicit $v0
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...
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---
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name: ult_i32
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1
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; MIPS32-LABEL: name: ult_i32
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
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; MIPS32: [[SLTu:%[0-9]+]]:gpr32 = SLTu [[COPY]], [[COPY1]]
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; MIPS32: $v0 = COPY [[SLTu]]
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; MIPS32: RetRA implicit $v0
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%0:gprb(s32) = COPY $a0
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%1:gprb(s32) = COPY $a1
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%4:gprb(s32) = G_ICMP intpred(ult), %0(s32), %1
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%3:gprb(s32) = COPY %4(s32)
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$v0 = COPY %3(s32)
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RetRA implicit $v0
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...
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---
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name: ule_i32
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1
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; MIPS32-LABEL: name: ule_i32
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
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; MIPS32: [[SLTu:%[0-9]+]]:gpr32 = SLTu [[COPY1]], [[COPY]]
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; MIPS32: [[XORi:%[0-9]+]]:gpr32 = XORi [[SLTu]], 1
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; MIPS32: $v0 = COPY [[XORi]]
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; MIPS32: RetRA implicit $v0
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%0:gprb(s32) = COPY $a0
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%1:gprb(s32) = COPY $a1
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%4:gprb(s32) = G_ICMP intpred(ule), %0(s32), %1
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%3:gprb(s32) = COPY %4(s32)
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$v0 = COPY %3(s32)
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RetRA implicit $v0
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...
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---
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name: eq_ptr
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alignment: 4
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $a0, $a1
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; MIPS32-LABEL: name: eq_ptr
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; MIPS32: liveins: $a0, $a1
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; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
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; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1
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; MIPS32: [[XOR:%[0-9]+]]:gpr32 = XOR [[COPY]], [[COPY1]]
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; MIPS32: [[SLTiu:%[0-9]+]]:gpr32 = SLTiu [[XOR]], 1
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; MIPS32: $v0 = COPY [[SLTiu]]
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; MIPS32: RetRA implicit $v0
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%0:gprb(p0) = COPY $a0
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%1:gprb(p0) = COPY $a1
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%4:gprb(s32) = G_ICMP intpred(eq), %0(p0), %1
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%3:gprb(s32) = COPY %4(s32)
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$v0 = COPY %3(s32)
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RetRA implicit $v0
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...
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