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TheRock/compiler/amd-llvm/llvm/test/CodeGen/Mips/r5900-fpu-compare.ll
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Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

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7.5 KiB
LLVM
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=mips64el -mcpu=r5900 < %s | FileCheck %s
;
; Test that R5900 FPU comparisons only generate supported instructions.
; R5900 only supports: C.F (0x30), C.EQ (0x32), C.OLT (0x34), C.OLE (0x36)
define i32 @test_oeq(float %a, float %b) {
; CHECK-LABEL: test_oeq:
; CHECK: # %bb.0:
; CHECK-NEXT: c.eq.s $f12, $f13
; CHECK-NEXT: nop
; CHECK-NEXT: bc1f .LBB0_2
; CHECK-NEXT: addiu $2, $zero, 0
; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: addiu $2, $zero, 1
; CHECK-NEXT: .LBB0_2:
; CHECK-NEXT: jr $ra
; CHECK-NEXT: nop
%cmp = fcmp oeq float %a, %b
%result = zext i1 %cmp to i32
ret i32 %result
}
define i32 @test_olt(float %a, float %b) {
; CHECK-LABEL: test_olt:
; CHECK: # %bb.0:
; CHECK-NEXT: c.olt.s $f12, $f13
; CHECK-NEXT: nop
; CHECK-NEXT: bc1f .LBB1_2
; CHECK-NEXT: addiu $2, $zero, 0
; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: addiu $2, $zero, 1
; CHECK-NEXT: .LBB1_2:
; CHECK-NEXT: jr $ra
; CHECK-NEXT: nop
%cmp = fcmp olt float %a, %b
%result = zext i1 %cmp to i32
ret i32 %result
}
define i32 @test_ole(float %a, float %b) {
; CHECK-LABEL: test_ole:
; CHECK: # %bb.0:
; CHECK-NEXT: c.ole.s $f12, $f13
; CHECK-NEXT: nop
; CHECK-NEXT: bc1f .LBB2_2
; CHECK-NEXT: addiu $2, $zero, 0
; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: addiu $2, $zero, 1
; CHECK-NEXT: .LBB2_2:
; CHECK-NEXT: jr $ra
; CHECK-NEXT: nop
%cmp = fcmp ole float %a, %b
%result = zext i1 %cmp to i32
ret i32 %result
}
define i32 @test_ogt(float %a, float %b) {
; CHECK-LABEL: test_ogt:
; CHECK: # %bb.0:
; CHECK-NEXT: c.olt.s $f13, $f12
; CHECK-NEXT: nop
; CHECK-NEXT: bc1f .LBB3_2
; CHECK-NEXT: addiu $2, $zero, 0
; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: addiu $2, $zero, 1
; CHECK-NEXT: .LBB3_2:
; CHECK-NEXT: jr $ra
; CHECK-NEXT: nop
%cmp = fcmp ogt float %a, %b
%result = zext i1 %cmp to i32
ret i32 %result
}
define i32 @test_oge(float %a, float %b) {
; CHECK-LABEL: test_oge:
; CHECK: # %bb.0:
; CHECK-NEXT: c.ole.s $f13, $f12
; CHECK-NEXT: nop
; CHECK-NEXT: bc1f .LBB4_2
; CHECK-NEXT: addiu $2, $zero, 0
; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: addiu $2, $zero, 1
; CHECK-NEXT: .LBB4_2:
; CHECK-NEXT: jr $ra
; CHECK-NEXT: nop
%cmp = fcmp oge float %a, %b
%result = zext i1 %cmp to i32
ret i32 %result
}
define i32 @test_one(float %a, float %b) {
; CHECK-LABEL: test_one:
; CHECK: # %bb.0:
; CHECK-NEXT: addiu $2, $zero, 0
; CHECK-NEXT: c.olt.s $f12, $f13
; CHECK-NEXT: nop
; CHECK-NEXT: bc1t .LBB5_3
; CHECK-NEXT: addiu $3, $zero, 0
; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: c.olt.s $f13, $f12
; CHECK-NEXT: nop
; CHECK-NEXT: bc1t .LBB5_4
; CHECK-NEXT: nop
; CHECK-NEXT: .LBB5_2:
; CHECK-NEXT: jr $ra
; CHECK-NEXT: or $2, $2, $3
; CHECK-NEXT: .LBB5_3:
; CHECK-NEXT: c.olt.s $f13, $f12
; CHECK-NEXT: nop
; CHECK-NEXT: bc1f .LBB5_2
; CHECK-NEXT: addiu $3, $zero, 1
; CHECK-NEXT: .LBB5_4:
; CHECK-NEXT: addiu $2, $zero, 1
; CHECK-NEXT: jr $ra
; CHECK-NEXT: or $2, $2, $3
%cmp = fcmp one float %a, %b
%result = zext i1 %cmp to i32
ret i32 %result
}
define i32 @test_ueq(float %a, float %b) {
; CHECK-LABEL: test_ueq:
; CHECK: # %bb.0:
; CHECK-NEXT: addiu $2, $zero, 0
; CHECK-NEXT: c.olt.s $f12, $f13
; CHECK-NEXT: nop
; CHECK-NEXT: bc1f .LBB6_2
; CHECK-NEXT: addiu $3, $zero, 0
; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: addiu $3, $zero, 1
; CHECK-NEXT: .LBB6_2:
; CHECK-NEXT: c.olt.s $f13, $f12
; CHECK-NEXT: nop
; CHECK-NEXT: bc1f .LBB6_4
; CHECK-NEXT: nop
; CHECK-NEXT: # %bb.3:
; CHECK-NEXT: addiu $2, $zero, 1
; CHECK-NEXT: .LBB6_4:
; CHECK-NEXT: or $1, $2, $3
; CHECK-NEXT: jr $ra
; CHECK-NEXT: xori $2, $1, 1
%cmp = fcmp ueq float %a, %b
%result = zext i1 %cmp to i32
ret i32 %result
}
define i32 @test_ult(float %a, float %b) {
; CHECK-LABEL: test_ult:
; CHECK: # %bb.0:
; CHECK-NEXT: c.ole.s $f13, $f12
; CHECK-NEXT: nop
; CHECK-NEXT: bc1t .LBB7_2
; CHECK-NEXT: addiu $2, $zero, 0
; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: addiu $2, $zero, 1
; CHECK-NEXT: .LBB7_2:
; CHECK-NEXT: jr $ra
; CHECK-NEXT: nop
%cmp = fcmp ult float %a, %b
%result = zext i1 %cmp to i32
ret i32 %result
}
define i32 @test_ule(float %a, float %b) {
; CHECK-LABEL: test_ule:
; CHECK: # %bb.0:
; CHECK-NEXT: c.olt.s $f13, $f12
; CHECK-NEXT: nop
; CHECK-NEXT: bc1t .LBB8_2
; CHECK-NEXT: addiu $2, $zero, 0
; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: addiu $2, $zero, 1
; CHECK-NEXT: .LBB8_2:
; CHECK-NEXT: jr $ra
; CHECK-NEXT: nop
%cmp = fcmp ule float %a, %b
%result = zext i1 %cmp to i32
ret i32 %result
}
define i32 @test_ugt(float %a, float %b) {
; CHECK-LABEL: test_ugt:
; CHECK: # %bb.0:
; CHECK-NEXT: c.ole.s $f12, $f13
; CHECK-NEXT: nop
; CHECK-NEXT: bc1t .LBB9_2
; CHECK-NEXT: addiu $2, $zero, 0
; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: addiu $2, $zero, 1
; CHECK-NEXT: .LBB9_2:
; CHECK-NEXT: jr $ra
; CHECK-NEXT: nop
%cmp = fcmp ugt float %a, %b
%result = zext i1 %cmp to i32
ret i32 %result
}
define i32 @test_uge(float %a, float %b) {
; CHECK-LABEL: test_uge:
; CHECK: # %bb.0:
; CHECK-NEXT: c.olt.s $f12, $f13
; CHECK-NEXT: nop
; CHECK-NEXT: bc1t .LBB10_2
; CHECK-NEXT: addiu $2, $zero, 0
; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: addiu $2, $zero, 1
; CHECK-NEXT: .LBB10_2:
; CHECK-NEXT: jr $ra
; CHECK-NEXT: nop
%cmp = fcmp uge float %a, %b
%result = zext i1 %cmp to i32
ret i32 %result
}
define i32 @test_une(float %a, float %b) {
; CHECK-LABEL: test_une:
; CHECK: # %bb.0:
; CHECK-NEXT: c.eq.s $f12, $f13
; CHECK-NEXT: nop
; CHECK-NEXT: bc1t .LBB11_2
; CHECK-NEXT: addiu $2, $zero, 0
; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: addiu $2, $zero, 1
; CHECK-NEXT: .LBB11_2:
; CHECK-NEXT: jr $ra
; CHECK-NEXT: nop
%cmp = fcmp une float %a, %b
%result = zext i1 %cmp to i32
ret i32 %result
}
define i32 @test_ord(float %a, float %b) {
; CHECK-LABEL: test_ord:
; CHECK: # %bb.0:
; CHECK-NEXT: addiu $2, $zero, 0
; CHECK-NEXT: c.eq.s $f13, $f13
; CHECK-NEXT: nop
; CHECK-NEXT: bc1t .LBB12_3
; CHECK-NEXT: addiu $3, $zero, 0
; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: c.eq.s $f12, $f12
; CHECK-NEXT: nop
; CHECK-NEXT: bc1t .LBB12_4
; CHECK-NEXT: nop
; CHECK-NEXT: .LBB12_2:
; CHECK-NEXT: jr $ra
; CHECK-NEXT: and $2, $2, $3
; CHECK-NEXT: .LBB12_3:
; CHECK-NEXT: c.eq.s $f12, $f12
; CHECK-NEXT: nop
; CHECK-NEXT: bc1f .LBB12_2
; CHECK-NEXT: addiu $3, $zero, 1
; CHECK-NEXT: .LBB12_4:
; CHECK-NEXT: addiu $2, $zero, 1
; CHECK-NEXT: jr $ra
; CHECK-NEXT: and $2, $2, $3
%cmp = fcmp ord float %a, %b
%result = zext i1 %cmp to i32
ret i32 %result
}
define i32 @test_uno(float %a, float %b) {
; CHECK-LABEL: test_uno:
; CHECK: # %bb.0:
; CHECK-NEXT: addiu $2, $zero, 0
; CHECK-NEXT: c.eq.s $f13, $f13
; CHECK-NEXT: nop
; CHECK-NEXT: bc1f .LBB13_3
; CHECK-NEXT: addiu $3, $zero, 0
; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: c.eq.s $f12, $f12
; CHECK-NEXT: nop
; CHECK-NEXT: bc1f .LBB13_4
; CHECK-NEXT: nop
; CHECK-NEXT: .LBB13_2:
; CHECK-NEXT: jr $ra
; CHECK-NEXT: or $2, $2, $3
; CHECK-NEXT: .LBB13_3:
; CHECK-NEXT: c.eq.s $f12, $f12
; CHECK-NEXT: nop
; CHECK-NEXT: bc1t .LBB13_2
; CHECK-NEXT: addiu $3, $zero, 1
; CHECK-NEXT: .LBB13_4:
; CHECK-NEXT: addiu $2, $zero, 1
; CHECK-NEXT: jr $ra
; CHECK-NEXT: or $2, $2, $3
%cmp = fcmp uno float %a, %b
%result = zext i1 %cmp to i32
ret i32 %result
}
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