derek.holloway
7502bf64a4
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39 lines
1.6 KiB
LLVM
39 lines
1.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s -mcpu=sm_70 | FileCheck %s
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; RUN: %if ptxas-sm_70 %{ llc < %s -mcpu=sm_70 | %ptxas-verify -arch=sm_70 %}
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target triple = "nvptx64-nvidia-cuda"
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%struct.double2 = type { double, double }
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declare %struct.double2 @add(ptr align(16) byval(%struct.double2), ptr align(16) byval(%struct.double2))
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define void @call_byval(ptr %out, ptr %in1, ptr %in2) {
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; CHECK-LABEL: call_byval(
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; CHECK: {
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; CHECK-NEXT: .reg .b64 %rd<10>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b64 %rd1, [call_byval_param_0];
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; CHECK-NEXT: { // callseq 0, 0
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; CHECK-NEXT: .param .align 16 .b8 param0[16];
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; CHECK-NEXT: .param .align 16 .b8 param1[16];
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; CHECK-NEXT: .param .align 8 .b8 retval0[16];
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; CHECK-NEXT: ld.param.b64 %rd2, [call_byval_param_2];
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; CHECK-NEXT: ld.v2.b64 {%rd3, %rd4}, [%rd2];
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; CHECK-NEXT: st.param.v2.b64 [param1], {%rd3, %rd4};
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; CHECK-NEXT: ld.param.b64 %rd5, [call_byval_param_1];
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; CHECK-NEXT: ld.v2.b64 {%rd6, %rd7}, [%rd5];
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; CHECK-NEXT: st.param.v2.b64 [param0], {%rd6, %rd7};
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; CHECK-NEXT: call.uni (retval0), add, (param0, param1);
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; CHECK-NEXT: ld.param.b64 %rd8, [retval0+8];
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; CHECK-NEXT: ld.param.b64 %rd9, [retval0];
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; CHECK-NEXT: } // callseq 0
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; CHECK-NEXT: st.b64 [%rd1+8], %rd8;
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; CHECK-NEXT: st.b64 [%rd1], %rd9;
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; CHECK-NEXT: ret;
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%call = call %struct.double2 @add(ptr align(16) byval(%struct.double2) %in1, ptr align(16) byval(%struct.double2) %in2)
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store %struct.double2 %call, ptr %out, align 16
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ret void
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}
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