derek.holloway
7502bf64a4
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97 lines
4.0 KiB
LLVM
97 lines
4.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_100 -O3 | FileCheck %s --check-prefix=PIPELINE
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; RUN: opt < %s -passes='gvn<no-scalar-pre>' -S | llc -mtriple=nvptx64 -mcpu=sm_100 -O0 | FileCheck %s --check-prefix=NO-SCALAR-PRE
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; RUN: opt < %s -passes='gvn<scalar-pre>' -S | llc -mtriple=nvptx64 -mcpu=sm_100 -O0 | FileCheck %s --check-prefix=SCALAR-PRE
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; Scalar PRE inserts a critical-edge computation and a PHI for the common add.
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; That shape needs more NVPTX virtual registers than keeping the duplicated adds.
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define void @test_scalar_pre_option(ptr %arr, i8 %cond) {
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; PIPELINE-LABEL: test_scalar_pre_option(
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; PIPELINE: {
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; PIPELINE-NEXT: .reg .pred %p<2>;
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; PIPELINE-NEXT: .reg .b16 %rs<2>;
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; PIPELINE-NEXT: .reg .b32 %r<3>;
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; PIPELINE-NEXT: .reg .b64 %rd<2>;
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; PIPELINE-EMPTY:
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; PIPELINE-NEXT: // %bb.0: // %entry
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; PIPELINE-NEXT: ld.param.b64 %rd1, [test_scalar_pre_option_param_0];
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; PIPELINE-NEXT: ld.param.b8 %rs1, [test_scalar_pre_option_param_1];
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; PIPELINE-NEXT: setp.eq.b16 %p1, %rs1, 0;
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; PIPELINE-NEXT: ld.b32 %r2, [%rd1];
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; PIPELINE-NEXT: add.s32 %r1, %r2, 2;
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; PIPELINE-NEXT: @%p1 bra $L__BB0_2;
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; PIPELINE-NEXT: // %bb.1: // %if.then
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; PIPELINE-NEXT: st.b32 [%rd1+8], %r1;
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; PIPELINE-NEXT: $L__BB0_2: // %if.end
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; PIPELINE-NEXT: st.b32 [%rd1+12], %r1;
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; PIPELINE-NEXT: ret;
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;
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; NO-SCALAR-PRE-LABEL: test_scalar_pre_option(
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; NO-SCALAR-PRE: {
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; NO-SCALAR-PRE-NEXT: .reg .pred %p<2>;
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; NO-SCALAR-PRE-NEXT: .reg .b16 %rs<2>;
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; NO-SCALAR-PRE-NEXT: .reg .b32 %r<4>;
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; NO-SCALAR-PRE-NEXT: .reg .b64 %rd<2>;
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; NO-SCALAR-PRE-EMPTY:
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; NO-SCALAR-PRE-NEXT: // %bb.0: // %entry
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; NO-SCALAR-PRE-NEXT: ld.param.b8 %rs1, [test_scalar_pre_option_param_1];
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; NO-SCALAR-PRE-NEXT: ld.param.b64 %rd1, [test_scalar_pre_option_param_0];
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; NO-SCALAR-PRE-NEXT: setp.eq.b16 %p1, %rs1, 0;
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; NO-SCALAR-PRE-NEXT: ld.b32 %r1, [%rd1];
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; NO-SCALAR-PRE-NEXT: @%p1 bra $L__BB0_2;
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; NO-SCALAR-PRE-NEXT: bra.uni $L__BB0_1;
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; NO-SCALAR-PRE-NEXT: $L__BB0_1: // %if.then
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; NO-SCALAR-PRE-NEXT: add.s32 %r2, %r1, 2;
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; NO-SCALAR-PRE-NEXT: st.b32 [%rd1+8], %r2;
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; NO-SCALAR-PRE-NEXT: bra.uni $L__BB0_2;
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; NO-SCALAR-PRE-NEXT: $L__BB0_2: // %if.end
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; NO-SCALAR-PRE-NEXT: add.s32 %r3, %r1, 2;
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; NO-SCALAR-PRE-NEXT: st.b32 [%rd1+12], %r3;
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; NO-SCALAR-PRE-NEXT: ret;
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;
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; SCALAR-PRE-LABEL: test_scalar_pre_option(
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; SCALAR-PRE: {
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; SCALAR-PRE-NEXT: .reg .pred %p<2>;
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; SCALAR-PRE-NEXT: .reg .b16 %rs<2>;
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; SCALAR-PRE-NEXT: .reg .b32 %r<6>;
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; SCALAR-PRE-NEXT: .reg .b64 %rd<2>;
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; SCALAR-PRE-EMPTY:
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; SCALAR-PRE-NEXT: // %bb.0: // %entry
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; SCALAR-PRE-NEXT: ld.param.b8 %rs1, [test_scalar_pre_option_param_1];
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; SCALAR-PRE-NEXT: ld.param.b64 %rd1, [test_scalar_pre_option_param_0];
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; SCALAR-PRE-NEXT: setp.ne.b16 %p1, %rs1, 0;
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; SCALAR-PRE-NEXT: ld.b32 %r1, [%rd1];
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; SCALAR-PRE-NEXT: @%p1 bra $L__BB0_2;
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; SCALAR-PRE-NEXT: bra.uni $L__BB0_1;
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; SCALAR-PRE-NEXT: $L__BB0_1: // %entry.if.end_crit_edge
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; SCALAR-PRE-NEXT: add.s32 %r2, %r1, 2;
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; SCALAR-PRE-NEXT: mov.b32 %r5, %r2;
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; SCALAR-PRE-NEXT: bra.uni $L__BB0_3;
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; SCALAR-PRE-NEXT: $L__BB0_2: // %if.then
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; SCALAR-PRE-NEXT: add.s32 %r3, %r1, 2;
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; SCALAR-PRE-NEXT: st.b32 [%rd1+8], %r3;
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; SCALAR-PRE-NEXT: mov.b32 %r5, %r3;
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; SCALAR-PRE-NEXT: bra.uni $L__BB0_3;
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; SCALAR-PRE-NEXT: $L__BB0_3: // %if.end
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; SCALAR-PRE-NEXT: mov.b32 %r4, %r5;
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; SCALAR-PRE-NEXT: st.b32 [%rd1+12], %r4;
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; SCALAR-PRE-NEXT: ret;
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entry:
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%tobool.not = icmp eq i8 %cond, 0
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%tmp7.pre = load i32, ptr %arr, align 4
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br i1 %tobool.not, label %if.end, label %if.then
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if.then:
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%add = add nsw i32 %tmp7.pre, 2
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%getElem = getelementptr inbounds nuw i8, ptr %arr, i64 8
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store i32 %add, ptr %getElem, align 4
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br label %if.end
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if.end:
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%add8 = add nsw i32 %tmp7.pre, 2
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%getElem1 = getelementptr inbounds nuw i8, ptr %arr, i64 12
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store i32 %add8, ptr %getElem1, align 4
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ret void
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}
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