derek.holloway
7502bf64a4
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34 lines
1.2 KiB
LLVM
34 lines
1.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s -mcpu=sm_100 | FileCheck %s --check-prefix=F32X2
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; RUN: llc < %s -mcpu=sm_90 | FileCheck %s --check-prefix=NOF32X2
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; RUN: llc < %s -mcpu=sm_100 -nvptx-no-f32x2 | FileCheck %s --check-prefix=NOF32X2
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target triple = "nvptx64-nvidia-cuda"
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define <2 x float> @test(<2 x float> %a, <2 x float> %b) {
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; F32X2-LABEL: test(
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; F32X2: {
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; F32X2-NEXT: .reg .b64 %rd<4>;
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; F32X2-EMPTY:
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; F32X2-NEXT: // %bb.0:
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; F32X2-NEXT: ld.param.b64 %rd1, [test_param_0];
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; F32X2-NEXT: ld.param.b64 %rd2, [test_param_1];
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; F32X2-NEXT: add.rn.f32x2 %rd3, %rd1, %rd2;
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; F32X2-NEXT: st.param.b64 [func_retval0], %rd3;
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; F32X2-NEXT: ret;
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;
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; NOF32X2-LABEL: test(
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; NOF32X2: {
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; NOF32X2-NEXT: .reg .b32 %r<7>;
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; NOF32X2-EMPTY:
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; NOF32X2-NEXT: // %bb.0:
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; NOF32X2-NEXT: ld.param.v2.b32 {%r1, %r2}, [test_param_0];
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; NOF32X2-NEXT: ld.param.v2.b32 {%r3, %r4}, [test_param_1];
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; NOF32X2-NEXT: add.rn.f32 %r5, %r2, %r4;
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; NOF32X2-NEXT: add.rn.f32 %r6, %r1, %r3;
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; NOF32X2-NEXT: st.param.v2.b32 [func_retval0], {%r6, %r5};
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; NOF32X2-NEXT: ret;
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%c = fadd <2 x float> %a, %b
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ret <2 x float> %c
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}
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