derek.holloway
7502bf64a4
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113 lines
2.8 KiB
LLVM
113 lines
2.8 KiB
LLVM
; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 | FileCheck %s
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; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 | %ptxas-verify %}
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
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define void @one(i64 %a, i64 %b, ptr %p1, ptr %p2) {
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; CHECK: cvt.s64.s8
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; CHECK: cvt.s64.s8
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entry:
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%sext = shl i64 %a, 56
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%conv1 = ashr exact i64 %sext, 56
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%sext1 = shl i64 %b, 56
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%conv4 = ashr exact i64 %sext1, 56
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%shr = ashr i64 %a, 16
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%shr9 = ashr i64 %b, 16
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%add = add nsw i64 %conv4, %conv1
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store i64 %add, ptr %p1, align 8
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%add17 = add nsw i64 %shr9, %shr
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store i64 %add17, ptr %p2, align 8
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ret void
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}
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define void @two(i64 %a, i64 %b, ptr %p1, ptr %p2) {
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entry:
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; CHECK: cvt.s64.s32
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; CHECK: cvt.s64.s32
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%sext = shl i64 %a, 32
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%conv1 = ashr exact i64 %sext, 32
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%sext1 = shl i64 %b, 32
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%conv4 = ashr exact i64 %sext1, 32
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%shr = ashr i64 %a, 16
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%shr9 = ashr i64 %b, 16
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%add = add nsw i64 %conv4, %conv1
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store i64 %add, ptr %p1, align 8
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%add17 = add nsw i64 %shr9, %shr
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store i64 %add17, ptr %p2, align 8
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ret void
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}
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define void @three(i64 %a, i64 %b, ptr %p1, ptr %p2) {
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entry:
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; CHECK: cvt.s64.s16
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; CHECK: cvt.s64.s16
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%sext = shl i64 %a, 48
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%conv1 = ashr exact i64 %sext, 48
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%sext1 = shl i64 %b, 48
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%conv4 = ashr exact i64 %sext1, 48
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%shr = ashr i64 %a, 16
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%shr9 = ashr i64 %b, 16
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%add = add nsw i64 %conv4, %conv1
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store i64 %add, ptr %p1, align 8
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%add17 = add nsw i64 %shr9, %shr
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store i64 %add17, ptr %p2, align 8
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ret void
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}
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define void @four(i32 %a, i32 %b, ptr %p1, ptr %p2) {
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entry:
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; CHECK: cvt.s32.s8
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; CHECK: cvt.s32.s8
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%sext = shl i32 %a, 24
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%conv1 = ashr exact i32 %sext, 24
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%sext1 = shl i32 %b, 24
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%conv4 = ashr exact i32 %sext1, 24
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%shr = ashr i32 %a, 16
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%shr9 = ashr i32 %b, 16
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%add = add nsw i32 %conv4, %conv1
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store i32 %add, ptr %p1, align 4
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%add17 = add nsw i32 %shr9, %shr
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store i32 %add17, ptr %p2, align 4
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ret void
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}
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define void @five(i32 %a, i32 %b, ptr %p1, ptr %p2) {
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entry:
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; CHECK: cvt.s32.s16
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; CHECK: cvt.s32.s16
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%sext = shl i32 %a, 16
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%conv1 = ashr exact i32 %sext, 16
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%sext1 = shl i32 %b, 16
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%conv4 = ashr exact i32 %sext1, 16
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%shr = ashr i32 %a, 16
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%shr9 = ashr i32 %b, 16
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%add = add nsw i32 %conv4, %conv1
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store i32 %add, ptr %p1, align 4
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%add17 = add nsw i32 %shr9, %shr
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store i32 %add17, ptr %p2, align 4
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ret void
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}
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define void @six(i16 %a, i16 %b, ptr %p1, ptr %p2) {
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entry:
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; CHECK: cvt.s16.s8
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; CHECK: cvt.s16.s8
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%sext = shl i16 %a, 8
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%conv1 = ashr exact i16 %sext, 8
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%sext1 = shl i16 %b, 8
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%conv4 = ashr exact i16 %sext1, 8
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%shr = ashr i16 %a, 8
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%shr9 = ashr i16 %b, 8
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%add = add nsw i16 %conv4, %conv1
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store i16 %add, ptr %p1, align 4
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%add17 = add nsw i16 %shr9, %shr
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store i16 %add17, ptr %p2, align 4
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ret void
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}
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