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TheRock/compiler/amd-llvm/llvm/test/CodeGen/PowerPC/and_sext.ll
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derek.holloway 7502bf64a4
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Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

44 lines
1.3 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
; These tests should not contain a sign extend.
; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | FileCheck %s
; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | not grep extsh
; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- | not grep extsb
define i32 @test1(i32 %mode.0.i.0) {
; CHECK-LABEL: test1:
; CHECK: # %bb.0:
; CHECK-NEXT: rlwinm 3, 3, 0, 27, 28
; CHECK-NEXT: blr
%tmp.79 = trunc i32 %mode.0.i.0 to i16
%tmp.80 = sext i16 %tmp.79 to i32
%tmp.81 = and i32 %tmp.80, 24
ret i32 %tmp.81
}
define signext i16 @test2(i16 signext %X, i16 signext %x) {
; CHECK-LABEL: test2:
; CHECK: # %bb.0:
; CHECK-NEXT: add 3, 3, 4
; CHECK-NEXT: srawi 3, 3, 1
; CHECK-NEXT: blr
%tmp = sext i16 %X to i32
%tmp1 = sext i16 %x to i32
%tmp2 = add i32 %tmp, %tmp1
%tmp4 = ashr i32 %tmp2, 1
%tmp5 = trunc i32 %tmp4 to i16
%tmp45 = sext i16 %tmp5 to i32
%retval = trunc i32 %tmp45 to i16
ret i16 %retval
}
define signext i16 @test3(i32 zeroext %X) {
; CHECK-LABEL: test3:
; CHECK: # %bb.0:
; CHECK-NEXT: srawi 3, 3, 16
; CHECK-NEXT: blr
%tmp1 = lshr i32 %X, 16
%tmp2 = trunc i32 %tmp1 to i16
ret i16 %tmp2
}