derek.holloway
7502bf64a4
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56 lines
1.9 KiB
LLVM
56 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mcpu=ppc64 -mtriple=powerpc64-unknown-linux-gnu \
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; RUN: -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
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; RUN: < %s | FileCheck %s
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define void @_blah() {
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; CHECK-LABEL: _blah:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: li r3, 0
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; CHECK-NEXT: li r4, 15
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; CHECK-NEXT: lvx v3, 0, r4
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; CHECK-NEXT: addi r5, r1, -64
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; CHECK-NEXT: lvx v4, 0, r3
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; CHECK-NEXT: lvsl v2, 0, r3
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; CHECK-NEXT: vperm v2, v4, v3, v2
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; CHECK-NEXT: lwz r4, 16(0)
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; CHECK-NEXT: stvx v2, 0, r5
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; CHECK-NEXT: lhz r5, -64(r1)
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; CHECK-NEXT: lhz r6, -58(r1)
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; CHECK-NEXT: lhz r7, -52(r1)
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; CHECK-NEXT: sth r4, -34(r1)
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; CHECK-NEXT: sth r3, -36(r1)
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; CHECK-NEXT: sth r3, -40(r1)
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; CHECK-NEXT: sth r3, -44(r1)
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; CHECK-NEXT: sth r3, -48(r1)
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; CHECK-NEXT: addi r3, r1, -48
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; CHECK-NEXT: sth r7, -38(r1)
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; CHECK-NEXT: sth r6, -42(r1)
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; CHECK-NEXT: sth r5, -46(r1)
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; CHECK-NEXT: lvx v2, 0, r3
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; CHECK-NEXT: addi r3, r1, -32
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; CHECK-NEXT: vsldoi v3, v2, v2, 8
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; CHECK-NEXT: vmaxuw v2, v2, v3
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; CHECK-NEXT: vspltw v3, v2, 1
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; CHECK-NEXT: vmaxuw v2, v2, v3
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; CHECK-NEXT: stvx v2, 0, r3
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; CHECK-NEXT: lwz r3, -32(r1)
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; CHECK-NEXT: cmplwi r3, 0
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; CHECK-NEXT: blr
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entry:
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%wide.vec904 = load <12 x i16>, ptr null, align 2
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%strided.vec905 = shufflevector <12 x i16> %wide.vec904, <12 x i16> zeroinitializer, <4 x i32> <i32 0, i32 3, i32 6, i32 9>
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%0 = zext <4 x i16> %strided.vec905 to <4 x i32>
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%1 = tail call i32 @llvm.vector.reduce.umax.v4i32(<4 x i32> %0)
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%cmp55.not823 = icmp ugt i32 1, %1
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br i1 %cmp55.not823, label %for.cond.cleanup56, label %for.body57.lr.ph
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for.body57.lr.ph: ; preds = %entry
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ret void
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for.cond.cleanup56: ; preds = %entry
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ret void
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}
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declare i32 @llvm.vector.reduce.umax.v4i32(<4 x i32>)
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