derek.holloway
7502bf64a4
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139 lines
4.3 KiB
LLVM
139 lines
4.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=powerpc64le -mcpu=pwr9 < %s | FileCheck %s
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define float @frem32(float %a, float %b) {
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; CHECK-LABEL: frem32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mflr 0
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; CHECK-NEXT: stdu 1, -32(1)
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; CHECK-NEXT: std 0, 48(1)
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: .cfi_offset lr, 16
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; CHECK-NEXT: bl fmodf
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; CHECK-NEXT: nop
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; CHECK-NEXT: addi 1, 1, 32
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; CHECK-NEXT: ld 0, 16(1)
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; CHECK-NEXT: mtlr 0
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; CHECK-NEXT: blr
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entry:
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%rem = frem fast float %a, %b
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ret float %rem
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}
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define double @frem64(double %a, double %b) {
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; CHECK-LABEL: frem64:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mflr 0
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; CHECK-NEXT: stdu 1, -32(1)
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; CHECK-NEXT: std 0, 48(1)
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: .cfi_offset lr, 16
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; CHECK-NEXT: bl fmod
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; CHECK-NEXT: nop
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; CHECK-NEXT: addi 1, 1, 32
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; CHECK-NEXT: ld 0, 16(1)
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; CHECK-NEXT: mtlr 0
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; CHECK-NEXT: blr
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entry:
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%rem = frem fast double %a, %b
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ret double %rem
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}
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define <4 x float> @frem4x32(<4 x float> %a, <4 x float> %b) {
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; CHECK-LABEL: frem4x32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mflr 0
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; CHECK-NEXT: stdu 1, -96(1)
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; CHECK-NEXT: std 0, 112(1)
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; CHECK-NEXT: .cfi_def_cfa_offset 96
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; CHECK-NEXT: .cfi_offset lr, 16
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; CHECK-NEXT: .cfi_offset v28, -64
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; CHECK-NEXT: .cfi_offset v29, -48
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; CHECK-NEXT: .cfi_offset v30, -32
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; CHECK-NEXT: .cfi_offset v31, -16
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; CHECK-NEXT: xxsldwi 0, 34, 34, 3
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; CHECK-NEXT: stxv 60, 32(1) # 16-byte Folded Spill
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; CHECK-NEXT: xscvspdpn 1, 0
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; CHECK-NEXT: xxsldwi 0, 35, 35, 3
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; CHECK-NEXT: stxv 61, 48(1) # 16-byte Folded Spill
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; CHECK-NEXT: stxv 62, 64(1) # 16-byte Folded Spill
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; CHECK-NEXT: stxv 63, 80(1) # 16-byte Folded Spill
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; CHECK-NEXT: xscvspdpn 2, 0
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; CHECK-NEXT: vmr 31, 3
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; CHECK-NEXT: vmr 30, 2
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; CHECK-NEXT: bl fmodf
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; CHECK-NEXT: nop
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; CHECK-NEXT: xxsldwi 0, 62, 62, 1
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; CHECK-NEXT: xscpsgndp 61, 1, 1
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; CHECK-NEXT: xscvspdpn 1, 0
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; CHECK-NEXT: xxsldwi 0, 63, 63, 1
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; CHECK-NEXT: xscvspdpn 2, 0
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; CHECK-NEXT: bl fmodf
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; CHECK-NEXT: nop
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; CHECK-NEXT: xxmrghd 0, 1, 61
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; CHECK-NEXT: xscvspdpn 1, 62
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; CHECK-NEXT: xscvspdpn 2, 63
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; CHECK-NEXT: xvcvdpsp 60, 0
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; CHECK-NEXT: bl fmodf
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; CHECK-NEXT: nop
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; CHECK-NEXT: xxswapd 0, 62
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; CHECK-NEXT: xscpsgndp 61, 1, 1
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; CHECK-NEXT: xscvspdpn 1, 0
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; CHECK-NEXT: xxswapd 0, 63
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; CHECK-NEXT: xscvspdpn 2, 0
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; CHECK-NEXT: bl fmodf
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; CHECK-NEXT: nop
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; CHECK-NEXT: xxmrghd 0, 61, 1
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; CHECK-NEXT: lxv 63, 80(1) # 16-byte Folded Reload
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; CHECK-NEXT: lxv 62, 64(1) # 16-byte Folded Reload
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; CHECK-NEXT: lxv 61, 48(1) # 16-byte Folded Reload
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; CHECK-NEXT: xvcvdpsp 34, 0
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; CHECK-NEXT: vmrgew 2, 2, 28
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; CHECK-NEXT: lxv 60, 32(1) # 16-byte Folded Reload
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; CHECK-NEXT: addi 1, 1, 96
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; CHECK-NEXT: ld 0, 16(1)
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; CHECK-NEXT: mtlr 0
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; CHECK-NEXT: blr
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entry:
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%rem = frem fast <4 x float> %a, %b
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ret <4 x float> %rem
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}
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define <2 x double> @frem2x64(<2 x double> %a, <2 x double> %b) {
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; CHECK-LABEL: frem2x64:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: mflr 0
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; CHECK-NEXT: stdu 1, -80(1)
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; CHECK-NEXT: std 0, 96(1)
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; CHECK-NEXT: .cfi_def_cfa_offset 80
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; CHECK-NEXT: .cfi_offset lr, 16
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; CHECK-NEXT: .cfi_offset v29, -48
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; CHECK-NEXT: .cfi_offset v30, -32
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; CHECK-NEXT: .cfi_offset v31, -16
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; CHECK-NEXT: stxv 62, 48(1) # 16-byte Folded Spill
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; CHECK-NEXT: stxv 63, 64(1) # 16-byte Folded Spill
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; CHECK-NEXT: vmr 31, 3
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; CHECK-NEXT: xscpsgndp 2, 63, 63
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; CHECK-NEXT: vmr 30, 2
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; CHECK-NEXT: xscpsgndp 1, 62, 62
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; CHECK-NEXT: stxv 61, 32(1) # 16-byte Folded Spill
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; CHECK-NEXT: bl fmod
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; CHECK-NEXT: nop
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; CHECK-NEXT: xscpsgndp 61, 1, 1
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; CHECK-NEXT: xxswapd 1, 62
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; CHECK-NEXT: xxswapd 2, 63
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; CHECK-NEXT: bl fmod
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; CHECK-NEXT: nop
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; CHECK-NEXT: xxmrghd 34, 61, 1
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; CHECK-NEXT: lxv 63, 64(1) # 16-byte Folded Reload
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; CHECK-NEXT: lxv 62, 48(1) # 16-byte Folded Reload
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; CHECK-NEXT: lxv 61, 32(1) # 16-byte Folded Reload
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; CHECK-NEXT: addi 1, 1, 80
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; CHECK-NEXT: ld 0, 16(1)
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; CHECK-NEXT: mtlr 0
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; CHECK-NEXT: blr
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entry:
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%rem = frem fast <2 x double> %a, %b
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ret <2 x double> %rem
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}
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