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108 lines
3.0 KiB
LLVM
108 lines
3.0 KiB
LLVM
; RUN: llc -mtriple=powerpc %s -o - | FileCheck %s --check-prefixes=CHECK,PPC32
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; RUN: llc -mtriple=powerpc64 %s -o - | FileCheck %s --check-prefixes=CHECK,PPC64
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; RUN: llc -mtriple=powerpc64le %s -o - | FileCheck %s --check-prefix=PPC64LE
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@a = global i32 0, align 4
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define void @f0() {
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; CHECK-LABEL: f0:
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; CHECK-NOT: nop
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; CHECK: # %bb.0:
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; CHECK-NEXT: blr
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; CHECK-NOT: .section __patchable_function_entries
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;
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; PPC64LE-LABEL: f0:
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; PPC64LE-NOT: nop
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; PPC64LE: # %bb.0:
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; PPC64LE-NEXT: blr
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; PPC64LE-NOT: .section __patchable_function_entries
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ret void
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}
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define void @f1() "patchable-function-entry"="0" {
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; CHECK-LABEL: f1:
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; CHECK-NOT: nop
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; CHECK: # %bb.0:
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; CHECK-NEXT: blr
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; CHECK-NOT: .section __patchable_function_entries
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;
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; PPC64LE-LABEL: f1:
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; PPC64LE: # %bb.0:
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; PPC64LE-NEXT: .Ltmp0:
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; PPC64LE-NEXT: b .Ltmp1
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; PPC64LE-NEXT: nop
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; PPC64LE-NEXT: std 0, -8(1)
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; PPC64LE-NEXT: mflr 0
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; PPC64LE-NEXT: bl __xray_FunctionEntry
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; PPC64LE-NEXT: nop
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; PPC64LE-NEXT: mtlr 0
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; PPC64LE-NEXT: .Ltmp1:
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; PPC64LE-NEXT: blr
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; PPC64LE-NOT: .section __patchable_function_entries
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; PPC64LE: .section xray_instr_map
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; PPC64LE: .section xray_fn_idx
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ret void
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}
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define void @f2() "patchable-function-entry"="1" {
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; CHECK-LABEL: f2:
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; CHECK-LABEL-NEXT: .Lfunc_begin2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: nop
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; CHECK-NEXT: blr
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; CHECK: .section __patchable_function_entries
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; PPC32: .p2align 2, 0x0
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; PPC64: .p2align 3, 0x0
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; PPC32-NEXT: .long .Lfunc_begin2
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; PPC64-NEXT: .quad .Lfunc_begin2
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;
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; PPC64LE-LABEL: f2:
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; PPC64LE-LABEL-NEXT: .Lfunc_begin2:
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; PPC64LE: # %bb.0:
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; PPC64LE-NEXT: nop
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; PPC64LE-NEXT: blr
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; PPC64LE: .section __patchable_function_entries
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; PPC64LE: .p2align 3, 0x0
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; PPC64LE-NEXT: .quad .Lfunc_begin2
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; PPC64LE-NOT: .section xray_instr_map
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; PPC64LE-NOT: .section xray_fn_idx
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ret void
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}
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define i32 @f3() "patchable-function-entry"="1" "patchable-function-prefix"="2" {
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; CHECK-LABEL: .Ltmp0:
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; CHECK-COUNT-2: nop
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; CHECK-LABEL: f3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: nop
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; PPC32: lis 3, a@ha
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; PPC32-NEXT: lwz 3, a@l(3)
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; PPC64: addis 3, 2, .LC0@toc@ha
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; PPC64-NEXT: ld 3, .LC0@toc@l(3)
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; PPC64-NEXT: lwz 3, 0(3)
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; CHECK: blr
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; CHECK: .section __patchable_function_entries
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; PPC32: .p2align 2, 0x0
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; PPC64: .p2align 3, 0x0
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; PPC32-NEXT: .long .Ltmp0
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; PPC64-NEXT: .quad .Ltmp0
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;
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; PC64LE-LABEL: .Ltmp3:
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; PC64LE-COUNT-2: nop
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; PC64LE-LABEL: f3:
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; PC64LE: # %bb.0:
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; PC64LE-NEXT: nop
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; PC64LE: addis 3, 2, .LC0@toc@ha
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; PC64LE-NEXT: ld 3, .LC0@toc@l(3)
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; PC64LE-NEXT: lwz 3, 0(3)
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; PC64LE: blr
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; PC64LE: .section __patchable_function_entries
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; PPC64LE: .p2align 3, 0x0
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; PPC64LE-NEXT: .quad .Ltmp3
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; PC64LE-NOT: .section xray_instr_map
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; PC64LE-NOT: .section xray_fn_idx
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entry:
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%0 = load i32, ptr @a, align 4
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ret i32 %0
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}
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