derek.holloway
7502bf64a4
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805 lines
41 KiB
YAML
805 lines
41 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple powerpc64le-unknown-linux-gnu -o - %s -verify-machineinstrs \
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# RUN: -run-pass=machine-sink | FileCheck %s
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--- |
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; ModuleID = 'sink-down-more-instructions-regpressure-high.ll'
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source_filename = "sink-down-more-instructions-regpressure-high.c"
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target datalayout = "e-m:e-i64:64-n32:64"
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target triple = "powerpc64le-unknown-linux-gnu"
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; This file check that %16:gprc in MIR can not be sunk down because of high
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; register pressure in destination block.
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; Function Attrs: nofree norecurse nounwind
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define dso_local signext i32 @foo(i32 signext %0, i32 signext %1, ptr nocapture readonly %2, ptr nocapture %3, i32 signext %4, ptr nocapture readonly %5, ptr nocapture readonly %6, ptr nocapture readonly %7, ptr nocapture readonly %8, ptr nocapture readonly %9, ptr nocapture readonly %10, ptr nocapture readonly %11, ptr nocapture readonly %12, ptr nocapture readonly %13, ptr nocapture readonly %14, ptr nocapture readonly %15, ptr nocapture readonly %16, ptr nocapture readonly %17, ptr nocapture readonly %18, ptr nocapture readonly %19, ptr nocapture readonly %20, ptr nocapture readonly %21, ptr nocapture readonly %22, ptr nocapture readonly %23, ptr nocapture readonly %24, ptr nocapture readonly %25, ptr nocapture readonly %26, ptr nocapture readonly %27, ptr nocapture readonly %28, ptr nocapture readonly %29, ptr nocapture readonly %30, ptr nocapture readonly %31, ptr nocapture readonly %32, ptr nocapture readonly %33, ptr nocapture readonly %34, ptr nocapture readonly %35, ptr nocapture readonly %36) local_unnamed_addr #0 {
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%38 = icmp sgt i32 %4, 0
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br i1 %38, label %39, label %41
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39: ; preds = %37
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%40 = zext i32 %4 to i64
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%scevgep = getelementptr i32, ptr %2, i64 -1
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%scevgep69 = bitcast ptr %scevgep to ptr
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%scevgep70 = getelementptr i32, ptr %5, i64 -1
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%scevgep7071 = bitcast ptr %scevgep70 to ptr
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%scevgep72 = getelementptr i32, ptr %6, i64 -1
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%scevgep7273 = bitcast ptr %scevgep72 to ptr
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call void @llvm.set.loop.iterations.i64(i64 %40)
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br label %42
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41: ; preds = %65, %37
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ret i32 undef
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42: ; preds = %65, %39
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%lsr.iv = phi i64 [ %lsr.iv.next, %65 ], [ 0, %39 ]
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%43 = phi i64 [ 0, %39 ], [ %163, %65 ]
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%44 = phi i32 [ 0, %39 ], [ %58, %65 ]
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%45 = phi ptr [ %scevgep69, %39 ], [ %52, %65 ]
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%46 = phi ptr [ %scevgep7071, %39 ], [ %50, %65 ]
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%47 = phi ptr [ %scevgep7273, %39 ], [ %48, %65 ]
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%48 = getelementptr i8, ptr %47, i64 4
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%49 = bitcast ptr %48 to ptr
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%50 = getelementptr i8, ptr %46, i64 4
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%51 = bitcast ptr %50 to ptr
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%52 = getelementptr i8, ptr %45, i64 4
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%53 = bitcast ptr %52 to ptr
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%lsr68 = trunc i64 %43 to i32
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%54 = udiv i32 %lsr68, 30
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%55 = mul nuw nsw i32 %54, 30
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%56 = sub i32 %lsr68, %55
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%57 = load i32, ptr %53, align 4, !tbaa !2
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%58 = add nsw i32 %57, %44
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switch i32 %0, label %64 [
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i32 1, label %59
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i32 3, label %62
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]
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59: ; preds = %42
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%60 = trunc i64 %43 to i32
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%61 = shl i32 %60, 1
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br label %65
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62: ; preds = %42
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%63 = add nuw nsw i32 %lsr68, 100
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br label %65
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64: ; preds = %42
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br label %65
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65: ; preds = %64, %62, %59
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%66 = phi i32 [ %56, %64 ], [ %63, %62 ], [ %61, %59 ]
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%67 = bitcast ptr %7 to ptr
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%68 = bitcast ptr %8 to ptr
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%69 = bitcast ptr %9 to ptr
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%70 = bitcast ptr %10 to ptr
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%71 = bitcast ptr %11 to ptr
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%72 = bitcast ptr %12 to ptr
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%73 = bitcast ptr %13 to ptr
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%74 = bitcast ptr %14 to ptr
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%75 = bitcast ptr %15 to ptr
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%76 = bitcast ptr %16 to ptr
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%77 = bitcast ptr %17 to ptr
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%78 = bitcast ptr %18 to ptr
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%79 = bitcast ptr %19 to ptr
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%80 = bitcast ptr %20 to ptr
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%81 = bitcast ptr %21 to ptr
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%82 = bitcast ptr %22 to ptr
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%83 = bitcast ptr %23 to ptr
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%84 = bitcast ptr %24 to ptr
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%85 = bitcast ptr %25 to ptr
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%86 = bitcast ptr %26 to ptr
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%87 = bitcast ptr %27 to ptr
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%88 = bitcast ptr %28 to ptr
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%89 = bitcast ptr %29 to ptr
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%90 = bitcast ptr %30 to ptr
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%91 = bitcast ptr %31 to ptr
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%92 = bitcast ptr %32 to ptr
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%93 = bitcast ptr %33 to ptr
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%94 = bitcast ptr %34 to ptr
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%95 = bitcast ptr %35 to ptr
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%96 = bitcast ptr %36 to ptr
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%97 = bitcast ptr %3 to ptr
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%98 = add nsw i32 %66, %58
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%99 = load i32, ptr %51, align 4, !tbaa !2
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%100 = add nsw i32 %98, %99
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%101 = load i32, ptr %49, align 4, !tbaa !2
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%102 = add nsw i32 %100, %101
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%uglygep60 = getelementptr i8, ptr %67, i64 %lsr.iv
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%uglygep6061 = bitcast ptr %uglygep60 to ptr
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%103 = load i32, ptr %uglygep6061, align 4, !tbaa !2
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%104 = add nsw i32 %102, %103
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%uglygep58 = getelementptr i8, ptr %68, i64 %lsr.iv
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%uglygep5859 = bitcast ptr %uglygep58 to ptr
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%105 = load i32, ptr %uglygep5859, align 4, !tbaa !2
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%106 = add nsw i32 %104, %105
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%uglygep56 = getelementptr i8, ptr %69, i64 %lsr.iv
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%uglygep5657 = bitcast ptr %uglygep56 to ptr
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%107 = load i32, ptr %uglygep5657, align 4, !tbaa !2
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%108 = add nsw i32 %106, %107
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%uglygep54 = getelementptr i8, ptr %70, i64 %lsr.iv
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%uglygep5455 = bitcast ptr %uglygep54 to ptr
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%109 = load i32, ptr %uglygep5455, align 4, !tbaa !2
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%110 = add nsw i32 %108, %109
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%uglygep52 = getelementptr i8, ptr %71, i64 %lsr.iv
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%uglygep5253 = bitcast ptr %uglygep52 to ptr
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%111 = load i32, ptr %uglygep5253, align 4, !tbaa !2
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%112 = add nsw i32 %110, %111
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%uglygep50 = getelementptr i8, ptr %72, i64 %lsr.iv
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%uglygep5051 = bitcast ptr %uglygep50 to ptr
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%113 = load i32, ptr %uglygep5051, align 4, !tbaa !2
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%114 = add nsw i32 %112, %113
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%uglygep48 = getelementptr i8, ptr %73, i64 %lsr.iv
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%uglygep4849 = bitcast ptr %uglygep48 to ptr
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%115 = load i32, ptr %uglygep4849, align 4, !tbaa !2
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%116 = add nsw i32 %114, %115
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%uglygep46 = getelementptr i8, ptr %74, i64 %lsr.iv
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%uglygep4647 = bitcast ptr %uglygep46 to ptr
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%117 = load i32, ptr %uglygep4647, align 4, !tbaa !2
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%118 = add nsw i32 %116, %117
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%uglygep44 = getelementptr i8, ptr %75, i64 %lsr.iv
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%uglygep4445 = bitcast ptr %uglygep44 to ptr
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%119 = load i32, ptr %uglygep4445, align 4, !tbaa !2
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%120 = add nsw i32 %118, %119
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%uglygep42 = getelementptr i8, ptr %76, i64 %lsr.iv
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%uglygep4243 = bitcast ptr %uglygep42 to ptr
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%121 = load i32, ptr %uglygep4243, align 4, !tbaa !2
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%122 = add nsw i32 %120, %121
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%uglygep40 = getelementptr i8, ptr %77, i64 %lsr.iv
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%uglygep4041 = bitcast ptr %uglygep40 to ptr
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%123 = load i32, ptr %uglygep4041, align 4, !tbaa !2
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%124 = add nsw i32 %122, %123
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%uglygep38 = getelementptr i8, ptr %78, i64 %lsr.iv
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%uglygep3839 = bitcast ptr %uglygep38 to ptr
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%125 = load i32, ptr %uglygep3839, align 4, !tbaa !2
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%126 = add nsw i32 %124, %125
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%uglygep36 = getelementptr i8, ptr %79, i64 %lsr.iv
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%uglygep3637 = bitcast ptr %uglygep36 to ptr
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%127 = load i32, ptr %uglygep3637, align 4, !tbaa !2
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%128 = add nsw i32 %126, %127
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%uglygep34 = getelementptr i8, ptr %80, i64 %lsr.iv
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%uglygep3435 = bitcast ptr %uglygep34 to ptr
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%129 = load i32, ptr %uglygep3435, align 4, !tbaa !2
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%130 = add nsw i32 %128, %129
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%uglygep32 = getelementptr i8, ptr %81, i64 %lsr.iv
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%uglygep3233 = bitcast ptr %uglygep32 to ptr
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%131 = load i32, ptr %uglygep3233, align 4, !tbaa !2
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%132 = add nsw i32 %130, %131
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%uglygep30 = getelementptr i8, ptr %82, i64 %lsr.iv
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%uglygep3031 = bitcast ptr %uglygep30 to ptr
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%133 = load i32, ptr %uglygep3031, align 4, !tbaa !2
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%134 = add nsw i32 %132, %133
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%uglygep28 = getelementptr i8, ptr %83, i64 %lsr.iv
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%uglygep2829 = bitcast ptr %uglygep28 to ptr
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%135 = load i32, ptr %uglygep2829, align 4, !tbaa !2
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%136 = add nsw i32 %134, %135
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%uglygep26 = getelementptr i8, ptr %84, i64 %lsr.iv
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%uglygep2627 = bitcast ptr %uglygep26 to ptr
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%137 = load i32, ptr %uglygep2627, align 4, !tbaa !2
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%138 = add nsw i32 %136, %137
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%uglygep24 = getelementptr i8, ptr %85, i64 %lsr.iv
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%uglygep2425 = bitcast ptr %uglygep24 to ptr
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%139 = load i32, ptr %uglygep2425, align 4, !tbaa !2
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%140 = add nsw i32 %138, %139
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%uglygep22 = getelementptr i8, ptr %86, i64 %lsr.iv
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%uglygep2223 = bitcast ptr %uglygep22 to ptr
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%141 = load i32, ptr %uglygep2223, align 4, !tbaa !2
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%142 = add nsw i32 %140, %141
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%uglygep20 = getelementptr i8, ptr %87, i64 %lsr.iv
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%uglygep2021 = bitcast ptr %uglygep20 to ptr
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%143 = load i32, ptr %uglygep2021, align 4, !tbaa !2
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%144 = add nsw i32 %142, %143
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%uglygep18 = getelementptr i8, ptr %88, i64 %lsr.iv
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%uglygep1819 = bitcast ptr %uglygep18 to ptr
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%145 = load i32, ptr %uglygep1819, align 4, !tbaa !2
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%146 = add nsw i32 %144, %145
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%uglygep16 = getelementptr i8, ptr %89, i64 %lsr.iv
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%uglygep1617 = bitcast ptr %uglygep16 to ptr
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%147 = load i32, ptr %uglygep1617, align 4, !tbaa !2
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%148 = add nsw i32 %146, %147
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%uglygep14 = getelementptr i8, ptr %90, i64 %lsr.iv
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%uglygep1415 = bitcast ptr %uglygep14 to ptr
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%149 = load i32, ptr %uglygep1415, align 4, !tbaa !2
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%150 = add nsw i32 %148, %149
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%uglygep12 = getelementptr i8, ptr %91, i64 %lsr.iv
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%uglygep1213 = bitcast ptr %uglygep12 to ptr
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%151 = load i32, ptr %uglygep1213, align 4, !tbaa !2
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%152 = add nsw i32 %150, %151
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%uglygep10 = getelementptr i8, ptr %92, i64 %lsr.iv
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%uglygep1011 = bitcast ptr %uglygep10 to ptr
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%153 = load i32, ptr %uglygep1011, align 4, !tbaa !2
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%154 = add nsw i32 %152, %153
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%uglygep8 = getelementptr i8, ptr %93, i64 %lsr.iv
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%uglygep89 = bitcast ptr %uglygep8 to ptr
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%155 = load i32, ptr %uglygep89, align 4, !tbaa !2
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%156 = add nsw i32 %154, %155
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%uglygep6 = getelementptr i8, ptr %94, i64 %lsr.iv
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%uglygep67 = bitcast ptr %uglygep6 to ptr
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%157 = load i32, ptr %uglygep67, align 4, !tbaa !2
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%158 = add nsw i32 %156, %157
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%uglygep4 = getelementptr i8, ptr %95, i64 %lsr.iv
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%uglygep45 = bitcast ptr %uglygep4 to ptr
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%159 = load i32, ptr %uglygep45, align 4, !tbaa !2
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%160 = add nsw i32 %158, %159
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%uglygep2 = getelementptr i8, ptr %96, i64 %lsr.iv
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%uglygep23 = bitcast ptr %uglygep2 to ptr
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%161 = load i32, ptr %uglygep23, align 4, !tbaa !2
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%162 = add nsw i32 %160, %161
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%uglygep = getelementptr i8, ptr %97, i64 %lsr.iv
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%uglygep1 = bitcast ptr %uglygep to ptr
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store i32 %162, ptr %uglygep1, align 4, !tbaa !2
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%163 = add nuw nsw i64 %43, 1
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%lsr.iv.next = add nuw nsw i64 %lsr.iv, 4
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%164 = call i1 @llvm.loop.decrement.i64(i64 1)
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br i1 %164, label %42, label %41
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}
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; Function Attrs: noduplicate nounwind
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declare void @llvm.set.loop.iterations.i64(i64) #1
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; Function Attrs: noduplicate nounwind
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declare i1 @llvm.loop.decrement.i64(i64) #1
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attributes #0 = { nofree norecurse nounwind "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="none" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="ppc64le" "target-features"="+altivec,+bpermd,+crypto,+direct-move,+extdiv,+htm,+power8-vector,+vsx,-power9-vector,-spe" "use-soft-float"="false" }
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attributes #1 = { noduplicate nounwind }
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!llvm.module.flags = !{!0}
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!llvm.ident = !{!1}
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!0 = !{i32 1, !"wchar_size", i32 4}
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!1 = !{!"clang version 12.0.0"}
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!2 = !{!3, !3, i64 0}
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!3 = !{!"int", !4, i64 0}
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!4 = !{!"omnipotent char", !5, i64 0}
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!5 = !{!"Simple C/C++ TBAA"}
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...
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---
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name: foo
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alignment: 16
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tracksRegLiveness: true
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registers:
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- { id: 0, class: g8rc }
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- { id: 1, class: g8rc }
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- { id: 2, class: g8rc }
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- { id: 3, class: g8rc_and_g8rc_nox0 }
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- { id: 4, class: g8rc_and_g8rc_nox0 }
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- { id: 5, class: gprc }
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- { id: 6, class: g8rc_and_g8rc_nox0 }
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- { id: 7, class: g8rc_and_g8rc_nox0 }
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- { id: 8, class: g8rc_and_g8rc_nox0 }
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- { id: 9, class: g8rc }
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- { id: 10, class: g8rc_and_g8rc_nox0 }
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- { id: 11, class: g8rc }
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- { id: 12, class: g8rc_and_g8rc_nox0 }
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- { id: 13, class: g8rc }
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- { id: 14, class: gprc_and_gprc_nor0 }
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- { id: 15, class: gprc }
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- { id: 16, class: gprc }
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- { id: 17, class: gprc }
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- { id: 18, class: gprc }
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- { id: 19, class: gprc }
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- { id: 20, class: g8rc }
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- { id: 21, class: g8rc }
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- { id: 22, class: g8rc }
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- { id: 23, class: g8rc }
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- { id: 24, class: g8rc_and_g8rc_nox0 }
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- { id: 25, class: g8rc_and_g8rc_nox0 }
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- { id: 26, class: g8rc }
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- { id: 27, class: g8rc_and_g8rc_nox0 }
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- { id: 28, class: g8rc_and_g8rc_nox0 }
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- { id: 29, class: g8rc_and_g8rc_nox0 }
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- { id: 30, class: gprc }
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- { id: 31, class: gprc }
|
|
- { id: 32, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 33, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 34, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 35, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 36, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 37, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 38, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 39, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 40, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 41, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 42, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 43, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 44, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 45, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 46, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 47, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 48, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 49, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 50, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 51, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 52, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 53, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 54, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 55, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 56, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 57, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 58, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 59, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 60, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 61, class: crrc }
|
|
- { id: 62, class: g8rc }
|
|
- { id: 63, class: gprc }
|
|
- { id: 64, class: g8rc }
|
|
- { id: 65, class: g8rc }
|
|
- { id: 66, class: g8rc }
|
|
- { id: 67, class: gprc }
|
|
- { id: 68, class: g8rc_and_g8rc_nox0 }
|
|
- { id: 69, class: gprc }
|
|
- { id: 70, class: gprc }
|
|
- { id: 71, class: gprc }
|
|
- { id: 72, class: gprc }
|
|
- { id: 73, class: gprc }
|
|
- { id: 74, class: crrc }
|
|
- { id: 75, class: crrc }
|
|
- { id: 76, class: gprc }
|
|
- { id: 77, class: gprc }
|
|
- { id: 78, class: gprc }
|
|
- { id: 79, class: gprc }
|
|
- { id: 80, class: gprc }
|
|
- { id: 81, class: gprc }
|
|
- { id: 82, class: gprc }
|
|
- { id: 83, class: gprc }
|
|
- { id: 84, class: gprc }
|
|
- { id: 85, class: gprc }
|
|
- { id: 86, class: gprc }
|
|
- { id: 87, class: gprc }
|
|
- { id: 88, class: gprc }
|
|
- { id: 89, class: gprc }
|
|
- { id: 90, class: gprc }
|
|
- { id: 91, class: gprc }
|
|
- { id: 92, class: gprc }
|
|
- { id: 93, class: gprc }
|
|
- { id: 94, class: gprc }
|
|
- { id: 95, class: gprc }
|
|
- { id: 96, class: gprc }
|
|
- { id: 97, class: gprc }
|
|
- { id: 98, class: gprc }
|
|
- { id: 99, class: gprc }
|
|
- { id: 100, class: gprc }
|
|
- { id: 101, class: gprc }
|
|
- { id: 102, class: gprc }
|
|
- { id: 103, class: gprc }
|
|
- { id: 104, class: gprc }
|
|
- { id: 105, class: gprc }
|
|
- { id: 106, class: gprc }
|
|
- { id: 107, class: gprc }
|
|
- { id: 108, class: gprc }
|
|
- { id: 109, class: gprc }
|
|
- { id: 110, class: gprc }
|
|
- { id: 111, class: gprc }
|
|
- { id: 112, class: gprc }
|
|
- { id: 113, class: gprc }
|
|
- { id: 114, class: gprc }
|
|
- { id: 115, class: gprc }
|
|
- { id: 116, class: gprc }
|
|
- { id: 117, class: gprc }
|
|
- { id: 118, class: gprc }
|
|
- { id: 119, class: gprc }
|
|
- { id: 120, class: gprc }
|
|
- { id: 121, class: gprc }
|
|
- { id: 122, class: gprc }
|
|
- { id: 123, class: gprc }
|
|
- { id: 124, class: gprc }
|
|
- { id: 125, class: gprc }
|
|
- { id: 126, class: gprc }
|
|
- { id: 127, class: gprc }
|
|
- { id: 128, class: gprc }
|
|
- { id: 129, class: gprc }
|
|
- { id: 130, class: gprc }
|
|
- { id: 131, class: gprc }
|
|
- { id: 132, class: gprc }
|
|
- { id: 133, class: gprc }
|
|
- { id: 134, class: gprc }
|
|
- { id: 135, class: gprc }
|
|
- { id: 136, class: gprc }
|
|
- { id: 137, class: gprc }
|
|
- { id: 138, class: gprc }
|
|
- { id: 139, class: gprc }
|
|
- { id: 140, class: gprc }
|
|
- { id: 141, class: gprc }
|
|
- { id: 142, class: g8rc }
|
|
liveins:
|
|
- { reg: '$x3', virtual-reg: '%22' }
|
|
- { reg: '$x5', virtual-reg: '%24' }
|
|
- { reg: '$x6', virtual-reg: '%25' }
|
|
- { reg: '$x7', virtual-reg: '%26' }
|
|
- { reg: '$x8', virtual-reg: '%27' }
|
|
- { reg: '$x9', virtual-reg: '%28' }
|
|
- { reg: '$x10', virtual-reg: '%29' }
|
|
frameInfo:
|
|
maxAlignment: 1
|
|
fixedStack:
|
|
- { id: 0, offset: 320, size: 8, alignment: 16, isImmutable: true }
|
|
- { id: 1, offset: 312, size: 8, alignment: 8, isImmutable: true }
|
|
- { id: 2, offset: 304, size: 8, alignment: 16, isImmutable: true }
|
|
- { id: 3, offset: 296, size: 8, alignment: 8, isImmutable: true }
|
|
- { id: 4, offset: 288, size: 8, alignment: 16, isImmutable: true }
|
|
- { id: 5, offset: 280, size: 8, alignment: 8, isImmutable: true }
|
|
- { id: 6, offset: 272, size: 8, alignment: 16, isImmutable: true }
|
|
- { id: 7, offset: 264, size: 8, alignment: 8, isImmutable: true }
|
|
- { id: 8, offset: 256, size: 8, alignment: 16, isImmutable: true }
|
|
- { id: 9, offset: 248, size: 8, alignment: 8, isImmutable: true }
|
|
- { id: 10, offset: 240, size: 8, alignment: 16, isImmutable: true }
|
|
- { id: 11, offset: 232, size: 8, alignment: 8, isImmutable: true }
|
|
- { id: 12, offset: 224, size: 8, alignment: 16, isImmutable: true }
|
|
- { id: 13, offset: 216, size: 8, alignment: 8, isImmutable: true }
|
|
- { id: 14, offset: 208, size: 8, alignment: 16, isImmutable: true }
|
|
- { id: 15, offset: 200, size: 8, alignment: 8, isImmutable: true }
|
|
- { id: 16, offset: 192, size: 8, alignment: 16, isImmutable: true }
|
|
- { id: 17, offset: 184, size: 8, alignment: 8, isImmutable: true }
|
|
- { id: 18, offset: 176, size: 8, alignment: 16, isImmutable: true }
|
|
- { id: 19, offset: 168, size: 8, alignment: 8, isImmutable: true }
|
|
- { id: 20, offset: 160, size: 8, alignment: 16, isImmutable: true }
|
|
- { id: 21, offset: 152, size: 8, alignment: 8, isImmutable: true }
|
|
- { id: 22, offset: 144, size: 8, alignment: 16, isImmutable: true }
|
|
- { id: 23, offset: 136, size: 8, alignment: 8, isImmutable: true }
|
|
- { id: 24, offset: 128, size: 8, alignment: 16, isImmutable: true }
|
|
- { id: 25, offset: 120, size: 8, alignment: 8, isImmutable: true }
|
|
- { id: 26, offset: 112, size: 8, alignment: 16, isImmutable: true }
|
|
- { id: 27, offset: 104, size: 8, alignment: 8, isImmutable: true }
|
|
- { id: 28, offset: 96, size: 8, alignment: 16, isImmutable: true }
|
|
machineFunctionInfo: {}
|
|
body: |
|
|
; CHECK-LABEL: name: foo
|
|
; CHECK: bb.0 (%ir-block.37):
|
|
; CHECK: successors: %bb.1(0x50000000), %bb.2(0x30000000)
|
|
; CHECK: liveins: $x3, $x5, $x6, $x7, $x8, $x9, $x10
|
|
; CHECK: [[COPY:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY $x10
|
|
; CHECK: [[COPY1:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY $x9
|
|
; CHECK: [[COPY2:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY $x8
|
|
; CHECK: [[COPY3:%[0-9]+]]:g8rc = COPY $x7
|
|
; CHECK: [[COPY4:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY $x6
|
|
; CHECK: [[COPY5:%[0-9]+]]:g8rc_and_g8rc_nox0 = COPY $x5
|
|
; CHECK: [[COPY6:%[0-9]+]]:g8rc = COPY $x3
|
|
; CHECK: [[COPY7:%[0-9]+]]:gprc = COPY [[COPY3]].sub_32
|
|
; CHECK: [[CMPWI:%[0-9]+]]:crrc = CMPWI [[COPY7]], 1
|
|
; CHECK: BCC 12, killed [[CMPWI]], %bb.2
|
|
; CHECK: B %bb.1
|
|
; CHECK: bb.1 (%ir-block.39):
|
|
; CHECK: successors: %bb.3(0x80000000)
|
|
; CHECK: [[COPY8:%[0-9]+]]:gprc = COPY [[COPY6]].sub_32
|
|
; CHECK: [[LD:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.28 :: (load (s64) from %fixed-stack.28, align 16)
|
|
; CHECK: [[LD1:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.27 :: (load (s64) from %fixed-stack.27)
|
|
; CHECK: [[LD2:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.26 :: (load (s64) from %fixed-stack.26, align 16)
|
|
; CHECK: [[LD3:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.25 :: (load (s64) from %fixed-stack.25)
|
|
; CHECK: [[LD4:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.24 :: (load (s64) from %fixed-stack.24, align 16)
|
|
; CHECK: [[LD5:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.23 :: (load (s64) from %fixed-stack.23)
|
|
; CHECK: [[LD6:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.22 :: (load (s64) from %fixed-stack.22, align 16)
|
|
; CHECK: [[LD7:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.21 :: (load (s64) from %fixed-stack.21)
|
|
; CHECK: [[LD8:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.20 :: (load (s64) from %fixed-stack.20, align 16)
|
|
; CHECK: [[LD9:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.19 :: (load (s64) from %fixed-stack.19)
|
|
; CHECK: [[LD10:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.18 :: (load (s64) from %fixed-stack.18, align 16)
|
|
; CHECK: [[LD11:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.17 :: (load (s64) from %fixed-stack.17)
|
|
; CHECK: [[LD12:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.16 :: (load (s64) from %fixed-stack.16, align 16)
|
|
; CHECK: [[LD13:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.15 :: (load (s64) from %fixed-stack.15)
|
|
; CHECK: [[LD14:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.14 :: (load (s64) from %fixed-stack.14, align 16)
|
|
; CHECK: [[LD15:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.13 :: (load (s64) from %fixed-stack.13)
|
|
; CHECK: [[LD16:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.12 :: (load (s64) from %fixed-stack.12, align 16)
|
|
; CHECK: [[LD17:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.11 :: (load (s64) from %fixed-stack.11)
|
|
; CHECK: [[LD18:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.10 :: (load (s64) from %fixed-stack.10, align 16)
|
|
; CHECK: [[LD19:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.9 :: (load (s64) from %fixed-stack.9)
|
|
; CHECK: [[LD20:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.8 :: (load (s64) from %fixed-stack.8, align 16)
|
|
; CHECK: [[LD21:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.7 :: (load (s64) from %fixed-stack.7)
|
|
; CHECK: [[LD22:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.6 :: (load (s64) from %fixed-stack.6, align 16)
|
|
; CHECK: [[LD23:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.5 :: (load (s64) from %fixed-stack.5)
|
|
; CHECK: [[LD24:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.4 :: (load (s64) from %fixed-stack.4, align 16)
|
|
; CHECK: [[LD25:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.3 :: (load (s64) from %fixed-stack.3)
|
|
; CHECK: [[LD26:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.2 :: (load (s64) from %fixed-stack.2, align 16)
|
|
; CHECK: [[LD27:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.1 :: (load (s64) from %fixed-stack.1)
|
|
; CHECK: [[LD28:%[0-9]+]]:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.0 :: (load (s64) from %fixed-stack.0, align 16)
|
|
; CHECK: [[DEF:%[0-9]+]]:g8rc = IMPLICIT_DEF
|
|
; CHECK: [[INSERT_SUBREG:%[0-9]+]]:g8rc = INSERT_SUBREG [[DEF]], [[COPY7]], %subreg.sub_32
|
|
; CHECK: [[RLDICL:%[0-9]+]]:g8rc = RLDICL killed [[INSERT_SUBREG]], 0, 32
|
|
; CHECK: [[ADDI8_:%[0-9]+]]:g8rc = ADDI8 [[COPY5]], -4
|
|
; CHECK: [[ADDI8_1:%[0-9]+]]:g8rc = ADDI8 [[COPY2]], -4
|
|
; CHECK: [[ADDI8_2:%[0-9]+]]:g8rc = ADDI8 [[COPY1]], -4
|
|
; CHECK: MTCTR8loop killed [[RLDICL]], implicit-def dead $ctr8
|
|
; CHECK: [[LI:%[0-9]+]]:gprc = LI 0
|
|
; CHECK: [[LI8_:%[0-9]+]]:g8rc = LI8 0
|
|
; CHECK: [[LIS:%[0-9]+]]:gprc = LIS 34952
|
|
; CHECK: [[ORI:%[0-9]+]]:gprc = ORI [[LIS]], 34953
|
|
; CHECK: [[CMPLWI:%[0-9]+]]:crrc = CMPLWI [[COPY8]], 3
|
|
; CHECK: [[CMPLWI1:%[0-9]+]]:crrc = CMPLWI [[COPY8]], 1
|
|
; CHECK: B %bb.3
|
|
; CHECK: bb.2 (%ir-block.41):
|
|
; CHECK: [[LI8_1:%[0-9]+]]:g8rc = LI8 0
|
|
; CHECK: $x3 = COPY [[LI8_1]]
|
|
; CHECK: BLR8 implicit $lr8, implicit $rm, implicit $x3
|
|
; CHECK: bb.3 (%ir-block.42):
|
|
; CHECK: successors: %bb.6(0x2aaaaaab), %bb.4(0x55555555)
|
|
; CHECK: [[PHI:%[0-9]+]]:g8rc_and_g8rc_nox0 = PHI [[LI8_]], %bb.1, %21, %bb.8
|
|
; CHECK: [[PHI1:%[0-9]+]]:g8rc_and_g8rc_nox0 = PHI [[LI8_]], %bb.1, %20, %bb.8
|
|
; CHECK: [[PHI2:%[0-9]+]]:gprc = PHI [[LI]], %bb.1, %16, %bb.8
|
|
; CHECK: [[PHI3:%[0-9]+]]:g8rc_and_g8rc_nox0 = PHI [[ADDI8_]], %bb.1, %13, %bb.8
|
|
; CHECK: [[PHI4:%[0-9]+]]:g8rc_and_g8rc_nox0 = PHI [[ADDI8_1]], %bb.1, %11, %bb.8
|
|
; CHECK: [[PHI5:%[0-9]+]]:g8rc_and_g8rc_nox0 = PHI [[ADDI8_2]], %bb.1, %9, %bb.8
|
|
; CHECK: [[LWZU:%[0-9]+]]:gprc, [[LWZU1:%[0-9]+]]:g8rc_and_g8rc_nox0 = LWZU 4, [[PHI3]] :: (load (s32) from %ir.53, !tbaa !2)
|
|
; CHECK: [[COPY9:%[0-9]+]]:gprc_and_gprc_nor0 = COPY [[PHI1]].sub_32
|
|
; CHECK: [[ADD4_:%[0-9]+]]:gprc = nsw ADD4 killed [[LWZU]], [[PHI2]]
|
|
; CHECK: BCC 76, [[CMPLWI]], %bb.6
|
|
; CHECK: B %bb.4
|
|
; CHECK: bb.4 (%ir-block.42):
|
|
; CHECK: successors: %bb.5(0x40000001), %bb.7(0x3fffffff)
|
|
; CHECK: BCC 68, [[CMPLWI1]], %bb.7
|
|
; CHECK: B %bb.5
|
|
; CHECK: bb.5 (%ir-block.59):
|
|
; CHECK: successors: %bb.8(0x80000000)
|
|
; CHECK: [[COPY10:%[0-9]+]]:gprc = COPY [[PHI1]].sub_32
|
|
; CHECK: [[RLWINM:%[0-9]+]]:gprc = RLWINM [[COPY10]], 1, 0, 30
|
|
; CHECK: B %bb.8
|
|
; CHECK: bb.6 (%ir-block.62):
|
|
; CHECK: successors: %bb.8(0x80000000)
|
|
; CHECK: [[ADDI:%[0-9]+]]:gprc = nuw nsw ADDI [[COPY9]], 100
|
|
; CHECK: B %bb.8
|
|
; CHECK: bb.7 (%ir-block.64):
|
|
; CHECK: successors: %bb.8(0x80000000)
|
|
; CHECK: [[MULHWU:%[0-9]+]]:gprc = MULHWU [[COPY9]], [[ORI]]
|
|
; CHECK: [[RLWINM1:%[0-9]+]]:gprc = RLWINM [[MULHWU]], 28, 4, 31
|
|
; CHECK: [[MULLI:%[0-9]+]]:gprc = nuw nsw MULLI [[RLWINM1]], 30
|
|
; CHECK: [[SUBF:%[0-9]+]]:gprc = SUBF [[MULLI]], [[COPY9]]
|
|
; CHECK: bb.8 (%ir-block.65):
|
|
; CHECK: successors: %bb.3(0x7c000000), %bb.2(0x04000000)
|
|
; CHECK: [[PHI6:%[0-9]+]]:gprc = PHI [[ADDI]], %bb.6, [[RLWINM]], %bb.5, [[SUBF]], %bb.7
|
|
; CHECK: [[ADDI8_3:%[0-9]+]]:g8rc_and_g8rc_nox0 = ADDI8 [[PHI5]], 4
|
|
; CHECK: [[COPY11:%[0-9]+]]:g8rc = COPY [[ADDI8_3]]
|
|
; CHECK: [[ADDI8_4:%[0-9]+]]:g8rc_and_g8rc_nox0 = ADDI8 [[PHI4]], 4
|
|
; CHECK: [[COPY12:%[0-9]+]]:g8rc = COPY [[ADDI8_4]]
|
|
; CHECK: [[COPY13:%[0-9]+]]:g8rc = COPY [[LWZU1]]
|
|
; CHECK: [[ADD4_1:%[0-9]+]]:gprc = nsw ADD4 [[PHI6]], [[ADD4_]]
|
|
; CHECK: [[LWZ:%[0-9]+]]:gprc = LWZ 0, [[ADDI8_4]] :: (load (s32) from %ir.51, !tbaa !2)
|
|
; CHECK: [[ADD4_2:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_1]], killed [[LWZ]]
|
|
; CHECK: [[LWZ1:%[0-9]+]]:gprc = LWZ 0, [[ADDI8_3]] :: (load (s32) from %ir.49, !tbaa !2)
|
|
; CHECK: [[ADD4_3:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_2]], killed [[LWZ1]]
|
|
; CHECK: [[LWZX:%[0-9]+]]:gprc = LWZX [[COPY]], [[PHI]] :: (load (s32) from %ir.uglygep6061, !tbaa !2)
|
|
; CHECK: [[ADD4_4:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_3]], killed [[LWZX]]
|
|
; CHECK: [[LWZX1:%[0-9]+]]:gprc = LWZX [[LD28]], [[PHI]] :: (load (s32) from %ir.uglygep5859, !tbaa !2)
|
|
; CHECK: [[ADD4_5:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_4]], killed [[LWZX1]]
|
|
; CHECK: [[LWZX2:%[0-9]+]]:gprc = LWZX [[LD27]], [[PHI]] :: (load (s32) from %ir.uglygep5657, !tbaa !2)
|
|
; CHECK: [[ADD4_6:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_5]], killed [[LWZX2]]
|
|
; CHECK: [[LWZX3:%[0-9]+]]:gprc = LWZX [[LD26]], [[PHI]] :: (load (s32) from %ir.uglygep5455, !tbaa !2)
|
|
; CHECK: [[ADD4_7:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_6]], killed [[LWZX3]]
|
|
; CHECK: [[LWZX4:%[0-9]+]]:gprc = LWZX [[LD25]], [[PHI]] :: (load (s32) from %ir.uglygep5253, !tbaa !2)
|
|
; CHECK: [[ADD4_8:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_7]], killed [[LWZX4]]
|
|
; CHECK: [[LWZX5:%[0-9]+]]:gprc = LWZX [[LD24]], [[PHI]] :: (load (s32) from %ir.uglygep5051, !tbaa !2)
|
|
; CHECK: [[ADD4_9:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_8]], killed [[LWZX5]]
|
|
; CHECK: [[LWZX6:%[0-9]+]]:gprc = LWZX [[LD23]], [[PHI]] :: (load (s32) from %ir.uglygep4849, !tbaa !2)
|
|
; CHECK: [[ADD4_10:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_9]], killed [[LWZX6]]
|
|
; CHECK: [[LWZX7:%[0-9]+]]:gprc = LWZX [[LD22]], [[PHI]] :: (load (s32) from %ir.uglygep4647, !tbaa !2)
|
|
; CHECK: [[ADD4_11:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_10]], killed [[LWZX7]]
|
|
; CHECK: [[LWZX8:%[0-9]+]]:gprc = LWZX [[LD21]], [[PHI]] :: (load (s32) from %ir.uglygep4445, !tbaa !2)
|
|
; CHECK: [[ADD4_12:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_11]], killed [[LWZX8]]
|
|
; CHECK: [[LWZX9:%[0-9]+]]:gprc = LWZX [[LD20]], [[PHI]] :: (load (s32) from %ir.uglygep4243, !tbaa !2)
|
|
; CHECK: [[ADD4_13:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_12]], killed [[LWZX9]]
|
|
; CHECK: [[LWZX10:%[0-9]+]]:gprc = LWZX [[LD19]], [[PHI]] :: (load (s32) from %ir.uglygep4041, !tbaa !2)
|
|
; CHECK: [[ADD4_14:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_13]], killed [[LWZX10]]
|
|
; CHECK: [[LWZX11:%[0-9]+]]:gprc = LWZX [[LD18]], [[PHI]] :: (load (s32) from %ir.uglygep3839, !tbaa !2)
|
|
; CHECK: [[ADD4_15:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_14]], killed [[LWZX11]]
|
|
; CHECK: [[LWZX12:%[0-9]+]]:gprc = LWZX [[LD17]], [[PHI]] :: (load (s32) from %ir.uglygep3637, !tbaa !2)
|
|
; CHECK: [[ADD4_16:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_15]], killed [[LWZX12]]
|
|
; CHECK: [[LWZX13:%[0-9]+]]:gprc = LWZX [[LD16]], [[PHI]] :: (load (s32) from %ir.uglygep3435, !tbaa !2)
|
|
; CHECK: [[ADD4_17:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_16]], killed [[LWZX13]]
|
|
; CHECK: [[LWZX14:%[0-9]+]]:gprc = LWZX [[LD15]], [[PHI]] :: (load (s32) from %ir.uglygep3233, !tbaa !2)
|
|
; CHECK: [[ADD4_18:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_17]], killed [[LWZX14]]
|
|
; CHECK: [[LWZX15:%[0-9]+]]:gprc = LWZX [[LD14]], [[PHI]] :: (load (s32) from %ir.uglygep3031, !tbaa !2)
|
|
; CHECK: [[ADD4_19:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_18]], killed [[LWZX15]]
|
|
; CHECK: [[LWZX16:%[0-9]+]]:gprc = LWZX [[LD13]], [[PHI]] :: (load (s32) from %ir.uglygep2829, !tbaa !2)
|
|
; CHECK: [[ADD4_20:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_19]], killed [[LWZX16]]
|
|
; CHECK: [[LWZX17:%[0-9]+]]:gprc = LWZX [[LD12]], [[PHI]] :: (load (s32) from %ir.uglygep2627, !tbaa !2)
|
|
; CHECK: [[ADD4_21:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_20]], killed [[LWZX17]]
|
|
; CHECK: [[LWZX18:%[0-9]+]]:gprc = LWZX [[LD11]], [[PHI]] :: (load (s32) from %ir.uglygep2425, !tbaa !2)
|
|
; CHECK: [[ADD4_22:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_21]], killed [[LWZX18]]
|
|
; CHECK: [[LWZX19:%[0-9]+]]:gprc = LWZX [[LD10]], [[PHI]] :: (load (s32) from %ir.uglygep2223, !tbaa !2)
|
|
; CHECK: [[ADD4_23:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_22]], killed [[LWZX19]]
|
|
; CHECK: [[LWZX20:%[0-9]+]]:gprc = LWZX [[LD9]], [[PHI]] :: (load (s32) from %ir.uglygep2021, !tbaa !2)
|
|
; CHECK: [[ADD4_24:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_23]], killed [[LWZX20]]
|
|
; CHECK: [[LWZX21:%[0-9]+]]:gprc = LWZX [[LD8]], [[PHI]] :: (load (s32) from %ir.uglygep1819, !tbaa !2)
|
|
; CHECK: [[ADD4_25:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_24]], killed [[LWZX21]]
|
|
; CHECK: [[LWZX22:%[0-9]+]]:gprc = LWZX [[LD7]], [[PHI]] :: (load (s32) from %ir.uglygep1617, !tbaa !2)
|
|
; CHECK: [[ADD4_26:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_25]], killed [[LWZX22]]
|
|
; CHECK: [[LWZX23:%[0-9]+]]:gprc = LWZX [[LD6]], [[PHI]] :: (load (s32) from %ir.uglygep1415, !tbaa !2)
|
|
; CHECK: [[ADD4_27:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_26]], killed [[LWZX23]]
|
|
; CHECK: [[LWZX24:%[0-9]+]]:gprc = LWZX [[LD5]], [[PHI]] :: (load (s32) from %ir.uglygep1213, !tbaa !2)
|
|
; CHECK: [[ADD4_28:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_27]], killed [[LWZX24]]
|
|
; CHECK: [[LWZX25:%[0-9]+]]:gprc = LWZX [[LD4]], [[PHI]] :: (load (s32) from %ir.uglygep1011, !tbaa !2)
|
|
; CHECK: [[ADD4_29:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_28]], killed [[LWZX25]]
|
|
; CHECK: [[LWZX26:%[0-9]+]]:gprc = LWZX [[LD3]], [[PHI]] :: (load (s32) from %ir.uglygep89, !tbaa !2)
|
|
; CHECK: [[ADD4_30:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_29]], killed [[LWZX26]]
|
|
; CHECK: [[LWZX27:%[0-9]+]]:gprc = LWZX [[LD2]], [[PHI]] :: (load (s32) from %ir.uglygep67, !tbaa !2)
|
|
; CHECK: [[ADD4_31:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_30]], killed [[LWZX27]]
|
|
; CHECK: [[LWZX28:%[0-9]+]]:gprc = LWZX [[LD1]], [[PHI]] :: (load (s32) from %ir.uglygep45, !tbaa !2)
|
|
; CHECK: [[ADD4_32:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_31]], killed [[LWZX28]]
|
|
; CHECK: [[LWZX29:%[0-9]+]]:gprc = LWZX [[LD]], [[PHI]] :: (load (s32) from %ir.uglygep23, !tbaa !2)
|
|
; CHECK: [[ADD4_33:%[0-9]+]]:gprc = nsw ADD4 killed [[ADD4_32]], killed [[LWZX29]]
|
|
; CHECK: STWX killed [[ADD4_33]], [[COPY4]], [[PHI]] :: (store (s32) into %ir.uglygep1, !tbaa !2)
|
|
; CHECK: [[ADDI8_5:%[0-9]+]]:g8rc = nuw nsw ADDI8 [[PHI1]], 1
|
|
; CHECK: [[ADDI8_6:%[0-9]+]]:g8rc = nuw nsw ADDI8 [[PHI]], 4
|
|
; CHECK: BDNZ8 %bb.3, implicit-def dead $ctr8, implicit $ctr8
|
|
; CHECK: B %bb.2
|
|
bb.0 (%ir-block.37):
|
|
successors: %bb.1(0x50000000), %bb.2(0x30000000)
|
|
liveins: $x3, $x5, $x6, $x7, $x8, $x9, $x10
|
|
|
|
%29:g8rc_and_g8rc_nox0 = COPY $x10
|
|
%28:g8rc_and_g8rc_nox0 = COPY $x9
|
|
%27:g8rc_and_g8rc_nox0 = COPY $x8
|
|
%26:g8rc = COPY $x7
|
|
%25:g8rc_and_g8rc_nox0 = COPY $x6
|
|
%24:g8rc_and_g8rc_nox0 = COPY $x5
|
|
%22:g8rc = COPY $x3
|
|
%30:gprc = COPY %22.sub_32
|
|
%31:gprc = COPY %26.sub_32
|
|
%60:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.0 :: (load (s64) from %fixed-stack.0, align 16)
|
|
%59:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.1 :: (load (s64) from %fixed-stack.1)
|
|
%58:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.2 :: (load (s64) from %fixed-stack.2, align 16)
|
|
%57:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.3 :: (load (s64) from %fixed-stack.3)
|
|
%56:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.4 :: (load (s64) from %fixed-stack.4, align 16)
|
|
%55:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.5 :: (load (s64) from %fixed-stack.5)
|
|
%54:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.6 :: (load (s64) from %fixed-stack.6, align 16)
|
|
%53:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.7 :: (load (s64) from %fixed-stack.7)
|
|
%52:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.8 :: (load (s64) from %fixed-stack.8, align 16)
|
|
%51:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.9 :: (load (s64) from %fixed-stack.9)
|
|
%50:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.10 :: (load (s64) from %fixed-stack.10, align 16)
|
|
%49:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.11 :: (load (s64) from %fixed-stack.11)
|
|
%48:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.12 :: (load (s64) from %fixed-stack.12, align 16)
|
|
%47:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.13 :: (load (s64) from %fixed-stack.13)
|
|
%46:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.14 :: (load (s64) from %fixed-stack.14, align 16)
|
|
%45:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.15 :: (load (s64) from %fixed-stack.15)
|
|
%44:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.16 :: (load (s64) from %fixed-stack.16, align 16)
|
|
%43:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.17 :: (load (s64) from %fixed-stack.17)
|
|
%42:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.18 :: (load (s64) from %fixed-stack.18, align 16)
|
|
%41:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.19 :: (load (s64) from %fixed-stack.19)
|
|
%40:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.20 :: (load (s64) from %fixed-stack.20, align 16)
|
|
%39:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.21 :: (load (s64) from %fixed-stack.21)
|
|
%38:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.22 :: (load (s64) from %fixed-stack.22, align 16)
|
|
%37:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.23 :: (load (s64) from %fixed-stack.23)
|
|
%36:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.24 :: (load (s64) from %fixed-stack.24, align 16)
|
|
%35:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.25 :: (load (s64) from %fixed-stack.25)
|
|
%34:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.26 :: (load (s64) from %fixed-stack.26, align 16)
|
|
%33:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.27 :: (load (s64) from %fixed-stack.27)
|
|
%32:g8rc_and_g8rc_nox0 = LD 0, %fixed-stack.28 :: (load (s64) from %fixed-stack.28, align 16)
|
|
%61:crrc = CMPWI %31, 1
|
|
BCC 12, killed %61, %bb.2
|
|
B %bb.1
|
|
|
|
bb.1 (%ir-block.39):
|
|
%65:g8rc = IMPLICIT_DEF
|
|
%64:g8rc = INSERT_SUBREG %65, %31, %subreg.sub_32
|
|
%66:g8rc = RLDICL killed %64, 0, 32
|
|
%0:g8rc = ADDI8 %24, -4
|
|
%1:g8rc = ADDI8 %27, -4
|
|
%2:g8rc = ADDI8 %28, -4
|
|
MTCTR8loop killed %66, implicit-def dead $ctr8
|
|
%63:gprc = LI 0
|
|
%62:g8rc = LI8 0
|
|
%69:gprc = LIS 34952
|
|
%70:gprc = ORI %69, 34953
|
|
%74:crrc = CMPLWI %30, 3
|
|
%75:crrc = CMPLWI %30, 1
|
|
B %bb.3
|
|
|
|
bb.2 (%ir-block.41):
|
|
%142:g8rc = LI8 0
|
|
$x3 = COPY %142
|
|
BLR8 implicit $lr8, implicit $rm, implicit $x3
|
|
|
|
bb.3 (%ir-block.42):
|
|
successors: %bb.5(0x2aaaaaab), %bb.8(0x55555555)
|
|
|
|
%3:g8rc_and_g8rc_nox0 = PHI %62, %bb.1, %21, %bb.7
|
|
%4:g8rc_and_g8rc_nox0 = PHI %62, %bb.1, %20, %bb.7
|
|
%5:gprc = PHI %63, %bb.1, %16, %bb.7
|
|
%6:g8rc_and_g8rc_nox0 = PHI %0, %bb.1, %13, %bb.7
|
|
%7:g8rc_and_g8rc_nox0 = PHI %1, %bb.1, %11, %bb.7
|
|
%8:g8rc_and_g8rc_nox0 = PHI %2, %bb.1, %9, %bb.7
|
|
%10:g8rc_and_g8rc_nox0 = ADDI8 %8, 4
|
|
%9:g8rc = COPY %10
|
|
%12:g8rc_and_g8rc_nox0 = ADDI8 %7, 4
|
|
%11:g8rc = COPY %12
|
|
%67:gprc, %68:g8rc_and_g8rc_nox0 = LWZU 4, %6 :: (load (s32) from %ir.53, !tbaa !2)
|
|
%13:g8rc = COPY %68
|
|
%14:gprc_and_gprc_nor0 = COPY %4.sub_32
|
|
%71:gprc = MULHWU %14, %70
|
|
%72:gprc = RLWINM %71, 28, 4, 31
|
|
%73:gprc = nuw nsw MULLI killed %72, 30
|
|
%15:gprc = SUBF killed %73, %14
|
|
%16:gprc = nsw ADD4 killed %67, %5
|
|
BCC 76, %74, %bb.5
|
|
B %bb.8
|
|
|
|
bb.8 (%ir-block.42):
|
|
successors: %bb.4(0x40000001), %bb.6(0x3fffffff)
|
|
|
|
BCC 68, %75, %bb.6
|
|
B %bb.4
|
|
|
|
bb.4 (%ir-block.59):
|
|
%76:gprc = COPY %4.sub_32
|
|
%17:gprc = RLWINM %76, 1, 0, 30
|
|
B %bb.7
|
|
|
|
bb.5 (%ir-block.62):
|
|
%18:gprc = nuw nsw ADDI %14, 100
|
|
B %bb.7
|
|
|
|
bb.6 (%ir-block.64):
|
|
|
|
bb.7 (%ir-block.65):
|
|
successors: %bb.3(0x7c000000), %bb.2(0x04000000)
|
|
|
|
%19:gprc = PHI %18, %bb.5, %17, %bb.4, %15, %bb.6
|
|
%77:gprc = nsw ADD4 %19, %16
|
|
%78:gprc = LWZ 0, %12 :: (load (s32) from %ir.51, !tbaa !2)
|
|
%79:gprc = nsw ADD4 killed %77, killed %78
|
|
%80:gprc = LWZ 0, %10 :: (load (s32) from %ir.49, !tbaa !2)
|
|
%81:gprc = nsw ADD4 killed %79, killed %80
|
|
%82:gprc = LWZX %29, %3 :: (load (s32) from %ir.uglygep6061, !tbaa !2)
|
|
%83:gprc = nsw ADD4 killed %81, killed %82
|
|
%84:gprc = LWZX %32, %3 :: (load (s32) from %ir.uglygep5859, !tbaa !2)
|
|
%85:gprc = nsw ADD4 killed %83, killed %84
|
|
%86:gprc = LWZX %33, %3 :: (load (s32) from %ir.uglygep5657, !tbaa !2)
|
|
%87:gprc = nsw ADD4 killed %85, killed %86
|
|
%88:gprc = LWZX %34, %3 :: (load (s32) from %ir.uglygep5455, !tbaa !2)
|
|
%89:gprc = nsw ADD4 killed %87, killed %88
|
|
%90:gprc = LWZX %35, %3 :: (load (s32) from %ir.uglygep5253, !tbaa !2)
|
|
%91:gprc = nsw ADD4 killed %89, killed %90
|
|
%92:gprc = LWZX %36, %3 :: (load (s32) from %ir.uglygep5051, !tbaa !2)
|
|
%93:gprc = nsw ADD4 killed %91, killed %92
|
|
%94:gprc = LWZX %37, %3 :: (load (s32) from %ir.uglygep4849, !tbaa !2)
|
|
%95:gprc = nsw ADD4 killed %93, killed %94
|
|
%96:gprc = LWZX %38, %3 :: (load (s32) from %ir.uglygep4647, !tbaa !2)
|
|
%97:gprc = nsw ADD4 killed %95, killed %96
|
|
%98:gprc = LWZX %39, %3 :: (load (s32) from %ir.uglygep4445, !tbaa !2)
|
|
%99:gprc = nsw ADD4 killed %97, killed %98
|
|
%100:gprc = LWZX %40, %3 :: (load (s32) from %ir.uglygep4243, !tbaa !2)
|
|
%101:gprc = nsw ADD4 killed %99, killed %100
|
|
%102:gprc = LWZX %41, %3 :: (load (s32) from %ir.uglygep4041, !tbaa !2)
|
|
%103:gprc = nsw ADD4 killed %101, killed %102
|
|
%104:gprc = LWZX %42, %3 :: (load (s32) from %ir.uglygep3839, !tbaa !2)
|
|
%105:gprc = nsw ADD4 killed %103, killed %104
|
|
%106:gprc = LWZX %43, %3 :: (load (s32) from %ir.uglygep3637, !tbaa !2)
|
|
%107:gprc = nsw ADD4 killed %105, killed %106
|
|
%108:gprc = LWZX %44, %3 :: (load (s32) from %ir.uglygep3435, !tbaa !2)
|
|
%109:gprc = nsw ADD4 killed %107, killed %108
|
|
%110:gprc = LWZX %45, %3 :: (load (s32) from %ir.uglygep3233, !tbaa !2)
|
|
%111:gprc = nsw ADD4 killed %109, killed %110
|
|
%112:gprc = LWZX %46, %3 :: (load (s32) from %ir.uglygep3031, !tbaa !2)
|
|
%113:gprc = nsw ADD4 killed %111, killed %112
|
|
%114:gprc = LWZX %47, %3 :: (load (s32) from %ir.uglygep2829, !tbaa !2)
|
|
%115:gprc = nsw ADD4 killed %113, killed %114
|
|
%116:gprc = LWZX %48, %3 :: (load (s32) from %ir.uglygep2627, !tbaa !2)
|
|
%117:gprc = nsw ADD4 killed %115, killed %116
|
|
%118:gprc = LWZX %49, %3 :: (load (s32) from %ir.uglygep2425, !tbaa !2)
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%119:gprc = nsw ADD4 killed %117, killed %118
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%120:gprc = LWZX %50, %3 :: (load (s32) from %ir.uglygep2223, !tbaa !2)
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%121:gprc = nsw ADD4 killed %119, killed %120
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%122:gprc = LWZX %51, %3 :: (load (s32) from %ir.uglygep2021, !tbaa !2)
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%123:gprc = nsw ADD4 killed %121, killed %122
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%124:gprc = LWZX %52, %3 :: (load (s32) from %ir.uglygep1819, !tbaa !2)
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|
%125:gprc = nsw ADD4 killed %123, killed %124
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%126:gprc = LWZX %53, %3 :: (load (s32) from %ir.uglygep1617, !tbaa !2)
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%127:gprc = nsw ADD4 killed %125, killed %126
|
|
%128:gprc = LWZX %54, %3 :: (load (s32) from %ir.uglygep1415, !tbaa !2)
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|
%129:gprc = nsw ADD4 killed %127, killed %128
|
|
%130:gprc = LWZX %55, %3 :: (load (s32) from %ir.uglygep1213, !tbaa !2)
|
|
%131:gprc = nsw ADD4 killed %129, killed %130
|
|
%132:gprc = LWZX %56, %3 :: (load (s32) from %ir.uglygep1011, !tbaa !2)
|
|
%133:gprc = nsw ADD4 killed %131, killed %132
|
|
%134:gprc = LWZX %57, %3 :: (load (s32) from %ir.uglygep89, !tbaa !2)
|
|
%135:gprc = nsw ADD4 killed %133, killed %134
|
|
%136:gprc = LWZX %58, %3 :: (load (s32) from %ir.uglygep67, !tbaa !2)
|
|
%137:gprc = nsw ADD4 killed %135, killed %136
|
|
%138:gprc = LWZX %59, %3 :: (load (s32) from %ir.uglygep45, !tbaa !2)
|
|
%139:gprc = nsw ADD4 killed %137, killed %138
|
|
%140:gprc = LWZX %60, %3 :: (load (s32) from %ir.uglygep23, !tbaa !2)
|
|
%141:gprc = nsw ADD4 killed %139, killed %140
|
|
STWX killed %141, %25, %3 :: (store (s32) into %ir.uglygep1, !tbaa !2)
|
|
%20:g8rc = nuw nsw ADDI8 %4, 1
|
|
%21:g8rc = nuw nsw ADDI8 %3, 4
|
|
BDNZ8 %bb.3, implicit-def dead $ctr8, implicit $ctr8
|
|
B %bb.2
|
|
|
|
...
|