TheRock/compiler/amd-llvm/llvm/test/CodeGen/RISCV/GlobalISel/constbarrier-rv64.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=riscv64 -global-isel -verify-machineinstrs < %s \
; RUN:   | FileCheck %s --check-prefixes=RV64

define i16 @constant_fold_barrier_i16(i16 %x, i16 %y) {
; RV64-LABEL: constant_fold_barrier_i16:
; RV64:       # %bb.0: # %entry
; RV64-NEXT:    li a1, 1
; RV64-NEXT:    slli a1, a1, 11
; RV64-NEXT:    and a0, a0, a1
; RV64-NEXT:    addi a1, a1, 289
; RV64-NEXT:    or a0, a0, a1
; RV64-NEXT:    ret
entry:
  %and = and i16 %x, 2048
  %or = or i16 %and, 2337
  ret i16 %or
}

define i128 @constant_fold_barrier_i128(i128 %x) {
; RV64-LABEL: constant_fold_barrier_i128:
; RV64:       # %bb.0: # %entry
; RV64-NEXT:    li a2, 1
; RV64-NEXT:    slli a2, a2, 11
; RV64-NEXT:    and a0, a0, a2
; RV64-NEXT:    add a0, a0, a2
; RV64-NEXT:    sltu a2, a0, a2
; RV64-NEXT:    mv a1, a2
; RV64-NEXT:    ret
entry:
  %and = and i128 %x, 2048
  %add = add i128 %and, 2048
  ret i128 %add
}