derek.holloway
7502bf64a4
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295 lines
7.6 KiB
YAML
295 lines
7.6 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=riscv32 -run-pass=instruction-select %s -o - \
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# RUN: -disable-gisel-legality-check | FileCheck %s
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---
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name: load_i8
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x10
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; CHECK-LABEL: name: load_i8
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; CHECK: liveins: $x10
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[LBU:%[0-9]+]]:gpr = LBU [[COPY]], 0 :: (load (s8))
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; CHECK-NEXT: $x10 = COPY [[LBU]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(p0) = COPY $x10
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%1:gprb(s32) = G_LOAD %0(p0) :: (load (s8))
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$x10 = COPY %1(s32)
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PseudoRET implicit $x10
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...
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---
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name: load_i16
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x10
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; CHECK-LABEL: name: load_i16
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; CHECK: liveins: $x10
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[LH:%[0-9]+]]:gpr = LH [[COPY]], 0 :: (load (s16))
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; CHECK-NEXT: $x10 = COPY [[LH]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(p0) = COPY $x10
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%1:gprb(s32) = G_LOAD %0(p0) :: (load (s16))
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$x10 = COPY %1(s32)
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PseudoRET implicit $x10
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...
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---
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name: load_i8_i16
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x10
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; CHECK-LABEL: name: load_i8_i16
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; CHECK: liveins: $x10
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[LBU:%[0-9]+]]:gpr = LBU [[COPY]], 0 :: (load (s8))
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; CHECK-NEXT: $x10 = COPY [[LBU]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(p0) = COPY $x10
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%1:gprb(s16) = G_LOAD %0(p0) :: (load (s8))
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%2:gprb(s32) = G_ANYEXT %1
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$x10 = COPY %2(s32)
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PseudoRET implicit $x10
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...
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---
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name: load_i16_i16
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x10
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; CHECK-LABEL: name: load_i16_i16
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; CHECK: liveins: $x10
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[LH:%[0-9]+]]:gpr = LH [[COPY]], 0 :: (load (s16))
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; CHECK-NEXT: $x10 = COPY [[LH]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(p0) = COPY $x10
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%1:gprb(s16) = G_LOAD %0(p0) :: (load (s16))
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%2:gprb(s32) = G_ANYEXT %1
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$x10 = COPY %2(s32)
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PseudoRET implicit $x10
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...
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---
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name: load_i32
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x10
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; CHECK-LABEL: name: load_i32
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; CHECK: liveins: $x10
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[LW:%[0-9]+]]:gpr = LW [[COPY]], 0 :: (load (s32))
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; CHECK-NEXT: $x10 = COPY [[LW]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(p0) = COPY $x10
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%1:gprb(s32) = G_LOAD %0(p0) :: (load (s32))
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$x10 = COPY %1(s32)
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PseudoRET implicit $x10
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...
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---
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name: zextload_i8
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x10
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; CHECK-LABEL: name: zextload_i8
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; CHECK: liveins: $x10
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[LBU:%[0-9]+]]:gpr = LBU [[COPY]], 0 :: (load (s8))
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; CHECK-NEXT: $x10 = COPY [[LBU]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(p0) = COPY $x10
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%1:gprb(s32) = G_ZEXTLOAD %0(p0) :: (load (s8))
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$x10 = COPY %1(s32)
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PseudoRET implicit $x10
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...
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---
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name: zextload_i16
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x10
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; CHECK-LABEL: name: zextload_i16
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; CHECK: liveins: $x10
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[LHU:%[0-9]+]]:gpr = LHU [[COPY]], 0 :: (load (s16))
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; CHECK-NEXT: $x10 = COPY [[LHU]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(p0) = COPY $x10
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%1:gprb(s32) = G_ZEXTLOAD %0(p0) :: (load (s16))
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$x10 = COPY %1(s32)
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PseudoRET implicit $x10
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...
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---
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name: sextload_i8
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x10
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; CHECK-LABEL: name: sextload_i8
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; CHECK: liveins: $x10
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[LB:%[0-9]+]]:gpr = LB [[COPY]], 0 :: (load (s8))
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; CHECK-NEXT: $x10 = COPY [[LB]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(p0) = COPY $x10
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%1:gprb(s32) = G_SEXTLOAD %0(p0) :: (load (s8))
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$x10 = COPY %1(s32)
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PseudoRET implicit $x10
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...
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---
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name: sextload_i16
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x10
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; CHECK-LABEL: name: sextload_i16
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; CHECK: liveins: $x10
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[LH:%[0-9]+]]:gpr = LH [[COPY]], 0 :: (load (s16))
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; CHECK-NEXT: $x10 = COPY [[LH]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(p0) = COPY $x10
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%1:gprb(s32) = G_SEXTLOAD %0(p0) :: (load (s16))
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$x10 = COPY %1(s32)
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PseudoRET implicit $x10
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...
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---
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name: load_p0
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x10
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; CHECK-LABEL: name: load_p0
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; CHECK: liveins: $x10
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[LW:%[0-9]+]]:gpr = LW [[COPY]], 0 :: (load (p0))
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; CHECK-NEXT: $x10 = COPY [[LW]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(p0) = COPY $x10
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%1:gprb(p0) = G_LOAD %0(p0) :: (load (p0))
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$x10 = COPY %1(p0)
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PseudoRET implicit $x10
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...
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---
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name: load_fi_i32
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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stack:
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- { id: 0, offset: 0, size: 4, alignment: 4 }
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body: |
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bb.0:
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; CHECK-LABEL: name: load_fi_i32
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; CHECK: [[LW:%[0-9]+]]:gpr = LW %stack.0, 0 :: (load (s32))
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; CHECK-NEXT: $x10 = COPY [[LW]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(p0) = G_FRAME_INDEX %stack.0
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%1:gprb(s32) = G_LOAD %0(p0) :: (load (s32))
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$x10 = COPY %1(s32)
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PseudoRET implicit $x10
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...
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---
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name: load_fi_gep_i32
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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stack:
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- { id: 0, offset: 0, size: 8, alignment: 4 }
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body: |
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bb.0:
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; CHECK-LABEL: name: load_fi_gep_i32
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; CHECK: [[LW:%[0-9]+]]:gpr = LW %stack.0, 4 :: (load (s32))
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; CHECK-NEXT: $x10 = COPY [[LW]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(p0) = G_FRAME_INDEX %stack.0
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%1:gprb(s32) = G_CONSTANT i32 4
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%2:gprb(p0) = G_PTR_ADD %0(p0), %1(s32)
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%3:gprb(s32) = G_LOAD %2(p0) :: (load (s32))
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$x10 = COPY %3(s32)
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PseudoRET implicit $x10
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...
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---
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name: load_gep_i32
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x10
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; CHECK-LABEL: name: load_gep_i32
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; CHECK: liveins: $x10
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[LW:%[0-9]+]]:gpr = LW [[COPY]], 4 :: (load (s32))
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; CHECK-NEXT: $x10 = COPY [[LW]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(p0) = COPY $x10
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%1:gprb(s32) = G_CONSTANT i32 4
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%2:gprb(p0) = G_PTR_ADD %0(p0), %1(s32)
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%3:gprb(s32) = G_LOAD %2(p0) :: (load (s32))
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$x10 = COPY %3(s32)
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PseudoRET implicit $x10
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...
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