derek.holloway
7502bf64a4
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193 lines
5.1 KiB
YAML
193 lines
5.1 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=riscv64 -mattr=+zbb -run-pass=instruction-select \
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# RUN: -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s
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# RUN: llc -mtriple=riscv64 -mattr=+zbkb -run-pass=instruction-select \
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# RUN: -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s
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---
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name: rotl_i32
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x10, $x11
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; CHECK-LABEL: name: rotl_i32
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; CHECK: liveins: $x10, $x11
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
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; CHECK-NEXT: [[ROLW:%[0-9]+]]:gpr = ROLW [[COPY]], [[COPY1]]
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; CHECK-NEXT: $x10 = COPY [[ROLW]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(s64) = COPY $x10
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%1:gprb(s64) = COPY $x11
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%2:gprb(s64) = G_ROLW %0, %1(s64)
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$x10 = COPY %2(s64)
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PseudoRET implicit $x10
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...
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---
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name: rotl_i64
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x10, $x11
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; CHECK-LABEL: name: rotl_i64
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; CHECK: liveins: $x10, $x11
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
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; CHECK-NEXT: [[ROL:%[0-9]+]]:gpr = ROL [[COPY]], [[COPY1]]
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; CHECK-NEXT: $x10 = COPY [[ROL]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(s64) = COPY $x10
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%1:gprb(s64) = COPY $x11
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%2:gprb(s64) = G_ROTL %0, %1(s64)
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$x10 = COPY %2(s64)
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PseudoRET implicit $x10
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...
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---
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name: rotr_i32
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $x10, $x11
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; CHECK-LABEL: name: rotr_i32
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; CHECK: liveins: $x10, $x11
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
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; CHECK-NEXT: [[RORW:%[0-9]+]]:gpr = RORW [[COPY]], [[COPY1]]
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; CHECK-NEXT: $x10 = COPY [[RORW]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(s64) = COPY $x10
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%1:gprb(s64) = COPY $x11
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%2:gprb(s64) = G_RORW %0, %1(s64)
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$x10 = COPY %2(s64)
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PseudoRET implicit $x10
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...
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---
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name: rotr_i64
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $x10, $x11
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; CHECK-LABEL: name: rotr_i64
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; CHECK: liveins: $x10, $x11
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
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; CHECK-NEXT: [[ROR:%[0-9]+]]:gpr = ROR [[COPY]], [[COPY1]]
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; CHECK-NEXT: $x10 = COPY [[ROR]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(s64) = COPY $x10
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%1:gprb(s64) = COPY $x11
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%2:gprb(s64) = G_ROTR %0, %1(s64)
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$x10 = COPY %2(s64)
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PseudoRET implicit $x10
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...
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---
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name: rotl_imm_i32
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x10
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; CHECK-LABEL: name: rotl_imm_i32
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; CHECK: liveins: $x10
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[RORIW:%[0-9]+]]:gpr = RORIW [[COPY]], 17
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; CHECK-NEXT: $x10 = COPY [[RORIW]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(s64) = COPY $x10
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%1:gprb(s64) = G_CONSTANT i64 15
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%2:gprb(s64) = G_ROLW %0, %1(s64)
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$x10 = COPY %2(s64)
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PseudoRET implicit $x10
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...
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---
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name: rotl_imm_i64
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x10
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; CHECK-LABEL: name: rotl_imm_i64
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; CHECK: liveins: $x10
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[RORI:%[0-9]+]]:gpr = RORI [[COPY]], 31
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; CHECK-NEXT: $x10 = COPY [[RORI]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(s64) = COPY $x10
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%1:gprb(s64) = G_CONSTANT i64 33
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%2:gprb(s64) = G_ROTL %0, %1(s64)
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$x10 = COPY %2(s64)
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PseudoRET implicit $x10
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...
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---
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name: rotr_imm_i32
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x10
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; CHECK-LABEL: name: rotr_imm_i32
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; CHECK: liveins: $x10
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[RORIW:%[0-9]+]]:gpr = RORIW [[COPY]], 15
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; CHECK-NEXT: $x10 = COPY [[RORIW]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(s64) = COPY $x10
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%1:gprb(s64) = G_CONSTANT i64 15
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%2:gprb(s64) = G_RORW %0, %1(s64)
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$x10 = COPY %2(s64)
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PseudoRET implicit $x10
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...
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---
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name: rotr_imm_i64
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x10
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; CHECK-LABEL: name: rotr_imm_i64
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; CHECK: liveins: $x10
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[RORI:%[0-9]+]]:gpr = RORI [[COPY]], 33
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; CHECK-NEXT: $x10 = COPY [[RORI]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(s64) = COPY $x10
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%1:gprb(s64) = G_CONSTANT i64 33
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%2:gprb(s64) = G_ROTR %0, %1(s64)
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$x10 = COPY %2(s64)
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PseudoRET implicit $x10
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...
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