derek.holloway
7502bf64a4
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247 lines
7.1 KiB
YAML
247 lines
7.1 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
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# RUN: llc -mtriple=riscv32 -run-pass=instruction-select \
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# RUN: -simplify-mir -verify-machineinstrs %s -o - | FileCheck %s
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# This 32-bit version doesn't have tests for zext, because there is no legal type to zext from.
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---
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name: shl
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x10, $x11
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; CHECK-LABEL: name: shl
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; CHECK: liveins: $x10, $x11
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
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; CHECK-NEXT: [[SLL:%[0-9]+]]:gpr = SLL [[COPY]], [[COPY1]]
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; CHECK-NEXT: $x10 = COPY [[SLL]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(s32) = COPY $x10
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%1:gprb(s32) = COPY $x11
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%3:gprb(s32) = G_SHL %0, %1
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$x10 = COPY %3(s32)
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PseudoRET implicit $x10
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...
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---
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name: shl_and
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x10, $x11
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; CHECK-LABEL: name: shl_and
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; CHECK: liveins: $x10, $x11
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
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; CHECK-NEXT: [[SLL:%[0-9]+]]:gpr = SLL [[COPY]], [[COPY1]]
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; CHECK-NEXT: $x10 = COPY [[SLL]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(s32) = COPY $x10
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%1:gprb(s32) = COPY $x11
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%2:gprb(s32) = G_CONSTANT i32 31
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%3:gprb(s32) = G_AND %1, %2
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%4:gprb(s32) = G_SHL %0, %3(s32)
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$x10 = COPY %4(s32)
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PseudoRET implicit $x10
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...
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---
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name: shl_and_with_simplified_mask
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x10, $x11
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; CHECK-LABEL: name: shl_and_with_simplified_mask
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; CHECK: liveins: $x10, $x11
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
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; CHECK-NEXT: [[ANDI:%[0-9]+]]:gpr = ANDI [[COPY1]], 31
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; CHECK-NEXT: [[SLL:%[0-9]+]]:gpr = SLL [[COPY]], [[ANDI]]
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; CHECK-NEXT: $x10 = COPY [[SLL]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(s32) = COPY $x10
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%1:gprb(s32) = COPY $x11
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%2:gprb(s32) = G_CONSTANT i32 31
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%3:gprb(s32) = G_AND %1, %2
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%4:gprb(s32) = G_CONSTANT i32 31
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%5:gprb(s32) = G_AND %3, %4
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%6:gprb(s32) = G_SHL %0, %5(s32)
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$x10 = COPY %6(s32)
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PseudoRET implicit $x10
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...
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---
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name: shl_add
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x10, $x11
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; CHECK-LABEL: name: shl_add
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; CHECK: liveins: $x10, $x11
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
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; CHECK-NEXT: [[SLL:%[0-9]+]]:gpr = SLL [[COPY]], [[COPY1]]
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; CHECK-NEXT: $x10 = COPY [[SLL]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(s32) = COPY $x10
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%1:gprb(s32) = COPY $x11
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%2:gprb(s32) = G_CONSTANT i32 32
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%3:gprb(s32) = G_ADD %1, %2
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%4:gprb(s32) = G_SHL %0, %3(s32)
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$x10 = COPY %4(s32)
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PseudoRET implicit $x10
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...
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---
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name: shl_sub
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x10, $x11
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; CHECK-LABEL: name: shl_sub
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; CHECK: liveins: $x10, $x11
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
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; CHECK-NEXT: [[SUB:%[0-9]+]]:gpr = SUB $x0, [[COPY1]]
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; CHECK-NEXT: [[SLL:%[0-9]+]]:gpr = SLL [[COPY]], [[SUB]]
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; CHECK-NEXT: $x10 = COPY [[SLL]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(s32) = COPY $x10
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%1:gprb(s32) = COPY $x11
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%2:gprb(s32) = G_CONSTANT i32 32
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%3:gprb(s32) = G_SUB %2, %1
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%4:gprb(s32) = G_SHL %0, %3(s32)
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$x10 = COPY %4(s32)
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PseudoRET implicit $x10
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...
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---
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name: shl_bitwise_not
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x10, $x11
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; CHECK-LABEL: name: shl_bitwise_not
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; CHECK: liveins: $x10, $x11
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
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; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[COPY1]], -1
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; CHECK-NEXT: [[SLL:%[0-9]+]]:gpr = SLL [[COPY]], [[XORI]]
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; CHECK-NEXT: $x10 = COPY [[SLL]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(s32) = COPY $x10
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%1:gprb(s32) = COPY $x11
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%2:gprb(s32) = G_CONSTANT i32 -1
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%3:gprb(s32) = G_SUB %2, %1
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%4:gprb(s32) = G_SHL %0, %3(s32)
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$x10 = COPY %4(s32)
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PseudoRET implicit $x10
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...
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---
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name: shl_bitwise_not_2
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $x10, $x11
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; CHECK-LABEL: name: shl_bitwise_not_2
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; CHECK: liveins: $x10, $x11
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
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; CHECK-NEXT: [[XORI:%[0-9]+]]:gpr = XORI [[COPY1]], -1
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; CHECK-NEXT: [[SLL:%[0-9]+]]:gpr = SLL [[COPY]], [[XORI]]
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; CHECK-NEXT: $x10 = COPY [[SLL]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(s32) = COPY $x10
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%1:gprb(s32) = COPY $x11
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%2:gprb(s32) = G_CONSTANT i32 31
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%3:gprb(s32) = G_SUB %2, %1
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%4:gprb(s32) = G_SHL %0, %3(s32)
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$x10 = COPY %4(s32)
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PseudoRET implicit $x10
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...
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---
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name: srl_and_needed
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $x10, $x11
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; CHECK-LABEL: name: srl_and_needed
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; CHECK: liveins: $x10, $x11
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
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; CHECK-NEXT: [[ANDI:%[0-9]+]]:gpr = ANDI [[COPY]], 15
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; CHECK-NEXT: [[SRL:%[0-9]+]]:gpr = SRL [[COPY1]], [[ANDI]]
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; CHECK-NEXT: $x10 = COPY [[SRL]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(s32) = COPY $x10
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%1:gprb(s32) = COPY $x11
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%2:gprb(s32) = G_CONSTANT i32 15
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%3:gprb(s32) = G_AND %0, %2
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%4:gprb(s32) = G_LSHR %1, %3(s32)
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$x10 = COPY %4(s32)
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PseudoRET implicit $x10
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...
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---
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name: srl_and_eliminated
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.1.entry:
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liveins: $x10, $x11
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; CHECK-LABEL: name: srl_and_eliminated
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; CHECK: liveins: $x10, $x11
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr = COPY $x10
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr = COPY $x11
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; CHECK-NEXT: [[ANDI:%[0-9]+]]:gpr = ANDI [[COPY]], 47
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; CHECK-NEXT: [[SRL:%[0-9]+]]:gpr = SRL [[COPY1]], [[ANDI]]
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; CHECK-NEXT: $x10 = COPY [[SRL]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%0:gprb(s32) = COPY $x10
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%1:gprb(s32) = COPY $x11
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%2:gprb(s32) = G_CONSTANT i32 15
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%3:gprb(s32) = G_CONSTANT i32 47
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%4:gprb(s32) = G_AND %0, %3
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%5:gprb(s32) = G_AND %4, %2
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%6:gprb(s32) = G_LSHR %1, %5(s32)
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$x10 = COPY %6(s32)
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PseudoRET implicit $x10
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...
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