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TheRock/compiler/amd-llvm/llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/frame-index.mir
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derek.holloway 7502bf64a4
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Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

34 lines
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=riscv32 -run-pass=regbankselect %s -o - \
# RUN: | FileCheck %s
# RUN: llc -mtriple=riscv64 -run-pass=regbankselect %s -o - \
# RUN: | FileCheck %s
--- |
define ptr @frame_index() {
entry:
%x = alloca i32, align 4
ret ptr %x
}
...
---
name: frame_index
legalized: true
registers:
- { id: 0, class: _, preferred-register: '' }
stack:
- { id: 0, name: x, type: default, offset: 0, size: 4, alignment: 4,
stack-id: default, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
body: |
bb.1.entry:
; CHECK-LABEL: name: frame_index
; CHECK: [[FRAME_INDEX:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %stack.0.x
; CHECK-NEXT: $x10 = COPY [[FRAME_INDEX]](p0)
; CHECK-NEXT: PseudoRET implicit $x10
%0:_(p0) = G_FRAME_INDEX %stack.0.x
$x10 = COPY %0(p0)
PseudoRET implicit $x10
...