derek.holloway
7502bf64a4
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288 lines
10 KiB
LLVM
288 lines
10 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
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; RUN: -target-abi=lp64 | FileCheck %s -check-prefixes=CHECK,RV64I
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; RUN: llc -mtriple=riscv64 -mattr=+d -verify-machineinstrs < %s \
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; RUN: -target-abi=lp64d | FileCheck %s -check-prefixes=CHECK,RV64ID
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; RUN: llc -mtriple=riscv64 -mattr=+zdinx -verify-machineinstrs < %s \
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; RUN: -target-abi=lp64 | FileCheck %s -check-prefixes=CHECK,RV64IDINX
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define i128 @fptosi_f64_to_i128(double %a) nounwind {
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; CHECK-LABEL: fptosi_f64_to_i128:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi sp, sp, -16
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; CHECK-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; CHECK-NEXT: call __fixdfti
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; CHECK-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
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; CHECK-NEXT: addi sp, sp, 16
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; CHECK-NEXT: ret
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%1 = fptosi double %a to i128
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ret i128 %1
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}
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define i128 @fptoui_f64_to_i128(double %a) nounwind {
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; CHECK-LABEL: fptoui_f64_to_i128:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi sp, sp, -16
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; CHECK-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; CHECK-NEXT: call __fixunsdfti
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; CHECK-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
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; CHECK-NEXT: addi sp, sp, 16
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; CHECK-NEXT: ret
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%1 = fptoui double %a to i128
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ret i128 %1
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}
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define double @sitofp_i128_to_f64(i128 %a) nounwind {
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; CHECK-LABEL: sitofp_i128_to_f64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi sp, sp, -16
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; CHECK-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; CHECK-NEXT: call __floattidf
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; CHECK-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
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; CHECK-NEXT: addi sp, sp, 16
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; CHECK-NEXT: ret
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%1 = sitofp i128 %a to double
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ret double %1
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}
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define double @uitofp_i128_to_f64(i128 %a) nounwind {
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; CHECK-LABEL: uitofp_i128_to_f64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi sp, sp, -16
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; CHECK-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
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; CHECK-NEXT: call __floatuntidf
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; CHECK-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
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; CHECK-NEXT: addi sp, sp, 16
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; CHECK-NEXT: ret
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%1 = uitofp i128 %a to double
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ret double %1
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}
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define i128 @fptosi_sat_f64_to_i128(double %a) nounwind {
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; RV64I-LABEL: fptosi_sat_f64_to_i128:
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; RV64I: # %bb.0:
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; RV64I-NEXT: addi sp, sp, -64
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; RV64I-NEXT: sd ra, 56(sp) # 8-byte Folded Spill
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; RV64I-NEXT: sd s0, 48(sp) # 8-byte Folded Spill
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; RV64I-NEXT: sd s1, 40(sp) # 8-byte Folded Spill
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; RV64I-NEXT: sd s2, 32(sp) # 8-byte Folded Spill
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; RV64I-NEXT: sd s3, 24(sp) # 8-byte Folded Spill
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; RV64I-NEXT: sd s4, 16(sp) # 8-byte Folded Spill
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; RV64I-NEXT: sd s5, 8(sp) # 8-byte Folded Spill
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; RV64I-NEXT: mv s0, a0
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; RV64I-NEXT: li a1, -449
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; RV64I-NEXT: slli a1, a1, 53
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; RV64I-NEXT: call __gedf2
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; RV64I-NEXT: mv s2, a0
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; RV64I-NEXT: mv a0, s0
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; RV64I-NEXT: call __fixdfti
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; RV64I-NEXT: mv s1, a0
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; RV64I-NEXT: mv s3, a1
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; RV64I-NEXT: li s5, -1
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; RV64I-NEXT: bgez s2, .LBB4_2
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; RV64I-NEXT: # %bb.1:
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; RV64I-NEXT: slli s3, s5, 63
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; RV64I-NEXT: .LBB4_2:
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; RV64I-NEXT: li a0, 575
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; RV64I-NEXT: slli a0, a0, 53
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; RV64I-NEXT: addi a1, a0, -1
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; RV64I-NEXT: mv a0, s0
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; RV64I-NEXT: call __gtdf2
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; RV64I-NEXT: mv s4, a0
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; RV64I-NEXT: blez a0, .LBB4_4
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; RV64I-NEXT: # %bb.3:
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; RV64I-NEXT: srli s3, s5, 1
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; RV64I-NEXT: .LBB4_4:
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; RV64I-NEXT: mv a0, s0
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; RV64I-NEXT: mv a1, s0
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; RV64I-NEXT: call __unorddf2
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; RV64I-NEXT: snez a0, a0
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; RV64I-NEXT: srli a1, s2, 63
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; RV64I-NEXT: sgtz a2, s4
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; RV64I-NEXT: addi a0, a0, -1
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; RV64I-NEXT: addi a3, a1, -1
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; RV64I-NEXT: and a1, a0, s3
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; RV64I-NEXT: and a3, a3, s1
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; RV64I-NEXT: neg a2, a2
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; RV64I-NEXT: or a2, a2, a3
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; RV64I-NEXT: and a0, a0, a2
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; RV64I-NEXT: ld ra, 56(sp) # 8-byte Folded Reload
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; RV64I-NEXT: ld s0, 48(sp) # 8-byte Folded Reload
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; RV64I-NEXT: ld s1, 40(sp) # 8-byte Folded Reload
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; RV64I-NEXT: ld s2, 32(sp) # 8-byte Folded Reload
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; RV64I-NEXT: ld s3, 24(sp) # 8-byte Folded Reload
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; RV64I-NEXT: ld s4, 16(sp) # 8-byte Folded Reload
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; RV64I-NEXT: ld s5, 8(sp) # 8-byte Folded Reload
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; RV64I-NEXT: addi sp, sp, 64
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; RV64I-NEXT: ret
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;
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; RV64ID-LABEL: fptosi_sat_f64_to_i128:
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; RV64ID: # %bb.0:
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; RV64ID-NEXT: addi sp, sp, -32
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; RV64ID-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
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; RV64ID-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; RV64ID-NEXT: fsd fs0, 8(sp) # 8-byte Folded Spill
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; RV64ID-NEXT: fmv.d fs0, fa0
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; RV64ID-NEXT: li a0, -449
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; RV64ID-NEXT: slli a0, a0, 53
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; RV64ID-NEXT: fmv.d.x fa5, a0
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; RV64ID-NEXT: fle.d s0, fa5, fa0
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; RV64ID-NEXT: call __fixdfti
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; RV64ID-NEXT: li a2, -1
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; RV64ID-NEXT: bnez s0, .LBB4_2
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; RV64ID-NEXT: # %bb.1:
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; RV64ID-NEXT: slli a1, a2, 63
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; RV64ID-NEXT: .LBB4_2:
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; RV64ID-NEXT: lui a3, %hi(.LCPI4_0)
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; RV64ID-NEXT: fld fa5, %lo(.LCPI4_0)(a3)
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; RV64ID-NEXT: flt.d a3, fa5, fs0
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; RV64ID-NEXT: beqz a3, .LBB4_4
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; RV64ID-NEXT: # %bb.3:
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; RV64ID-NEXT: srli a1, a2, 1
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; RV64ID-NEXT: .LBB4_4:
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; RV64ID-NEXT: feq.d a2, fs0, fs0
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; RV64ID-NEXT: neg a3, a3
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; RV64ID-NEXT: neg a4, s0
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; RV64ID-NEXT: neg a2, a2
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; RV64ID-NEXT: and a0, a4, a0
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; RV64ID-NEXT: and a1, a2, a1
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; RV64ID-NEXT: or a0, a3, a0
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; RV64ID-NEXT: and a0, a2, a0
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; RV64ID-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
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; RV64ID-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
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; RV64ID-NEXT: fld fs0, 8(sp) # 8-byte Folded Reload
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; RV64ID-NEXT: addi sp, sp, 32
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; RV64ID-NEXT: ret
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;
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; RV64IDINX-LABEL: fptosi_sat_f64_to_i128:
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; RV64IDINX: # %bb.0:
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; RV64IDINX-NEXT: addi sp, sp, -32
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; RV64IDINX-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
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; RV64IDINX-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; RV64IDINX-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
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; RV64IDINX-NEXT: mv s0, a0
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; RV64IDINX-NEXT: li a0, -449
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; RV64IDINX-NEXT: slli a0, a0, 53
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; RV64IDINX-NEXT: fle.d s1, a0, s0
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; RV64IDINX-NEXT: mv a0, s0
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; RV64IDINX-NEXT: call __fixdfti
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; RV64IDINX-NEXT: li a2, -1
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; RV64IDINX-NEXT: bnez s1, .LBB4_2
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; RV64IDINX-NEXT: # %bb.1:
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; RV64IDINX-NEXT: slli a1, a2, 63
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; RV64IDINX-NEXT: .LBB4_2:
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; RV64IDINX-NEXT: li a3, 575
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; RV64IDINX-NEXT: slli a3, a3, 53
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; RV64IDINX-NEXT: addi a3, a3, -1
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; RV64IDINX-NEXT: flt.d a3, a3, s0
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; RV64IDINX-NEXT: beqz a3, .LBB4_4
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; RV64IDINX-NEXT: # %bb.3:
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; RV64IDINX-NEXT: srli a1, a2, 1
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; RV64IDINX-NEXT: .LBB4_4:
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; RV64IDINX-NEXT: feq.d a2, s0, s0
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; RV64IDINX-NEXT: neg a4, s1
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; RV64IDINX-NEXT: neg a3, a3
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; RV64IDINX-NEXT: neg a2, a2
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; RV64IDINX-NEXT: and a0, a4, a0
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; RV64IDINX-NEXT: and a1, a2, a1
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; RV64IDINX-NEXT: or a0, a3, a0
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; RV64IDINX-NEXT: and a0, a2, a0
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; RV64IDINX-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
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; RV64IDINX-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
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; RV64IDINX-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
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; RV64IDINX-NEXT: addi sp, sp, 32
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; RV64IDINX-NEXT: ret
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%1 = tail call i128 @llvm.fptosi.sat.i128.f64(double %a)
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ret i128 %1
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}
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define i128 @fptoui_sat_f64_to_i128(double %a) nounwind {
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; RV64I-LABEL: fptoui_sat_f64_to_i128:
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; RV64I: # %bb.0:
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; RV64I-NEXT: addi sp, sp, -48
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; RV64I-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
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; RV64I-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
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; RV64I-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
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; RV64I-NEXT: sd s2, 16(sp) # 8-byte Folded Spill
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; RV64I-NEXT: sd s3, 8(sp) # 8-byte Folded Spill
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; RV64I-NEXT: mv s0, a0
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; RV64I-NEXT: li a1, 0
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; RV64I-NEXT: call __gedf2
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; RV64I-NEXT: srli a0, a0, 63
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; RV64I-NEXT: addi s2, a0, -1
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; RV64I-NEXT: mv a0, s0
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; RV64I-NEXT: call __fixunsdfti
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; RV64I-NEXT: mv s1, a1
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; RV64I-NEXT: and s3, s2, a0
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; RV64I-NEXT: li a0, 1151
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; RV64I-NEXT: slli a0, a0, 52
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; RV64I-NEXT: addi a1, a0, -1
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; RV64I-NEXT: mv a0, s0
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; RV64I-NEXT: call __gtdf2
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; RV64I-NEXT: sgtz a0, a0
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; RV64I-NEXT: and a1, s2, s1
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; RV64I-NEXT: neg a2, a0
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; RV64I-NEXT: or a0, a2, s3
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; RV64I-NEXT: or a1, a2, a1
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; RV64I-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
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; RV64I-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
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; RV64I-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
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; RV64I-NEXT: ld s2, 16(sp) # 8-byte Folded Reload
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; RV64I-NEXT: ld s3, 8(sp) # 8-byte Folded Reload
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; RV64I-NEXT: addi sp, sp, 48
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; RV64I-NEXT: ret
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;
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; RV64ID-LABEL: fptoui_sat_f64_to_i128:
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; RV64ID: # %bb.0:
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; RV64ID-NEXT: addi sp, sp, -32
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; RV64ID-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
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; RV64ID-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; RV64ID-NEXT: fsd fs0, 8(sp) # 8-byte Folded Spill
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; RV64ID-NEXT: fmv.d fs0, fa0
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; RV64ID-NEXT: fmv.d.x fa5, zero
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; RV64ID-NEXT: fle.d a0, fa5, fa0
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; RV64ID-NEXT: neg s0, a0
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; RV64ID-NEXT: call __fixunsdfti
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; RV64ID-NEXT: lui a2, %hi(.LCPI5_0)
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; RV64ID-NEXT: fld fa5, %lo(.LCPI5_0)(a2)
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; RV64ID-NEXT: and a0, s0, a0
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; RV64ID-NEXT: and a1, s0, a1
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; RV64ID-NEXT: flt.d a2, fa5, fs0
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; RV64ID-NEXT: neg a2, a2
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; RV64ID-NEXT: or a0, a2, a0
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; RV64ID-NEXT: or a1, a2, a1
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; RV64ID-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
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; RV64ID-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
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; RV64ID-NEXT: fld fs0, 8(sp) # 8-byte Folded Reload
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; RV64ID-NEXT: addi sp, sp, 32
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; RV64ID-NEXT: ret
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;
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; RV64IDINX-LABEL: fptoui_sat_f64_to_i128:
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; RV64IDINX: # %bb.0:
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; RV64IDINX-NEXT: addi sp, sp, -32
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; RV64IDINX-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
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; RV64IDINX-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
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; RV64IDINX-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
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; RV64IDINX-NEXT: mv s0, a0
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; RV64IDINX-NEXT: fle.d a0, zero, a0
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; RV64IDINX-NEXT: neg s1, a0
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; RV64IDINX-NEXT: mv a0, s0
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; RV64IDINX-NEXT: call __fixunsdfti
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; RV64IDINX-NEXT: and a0, s1, a0
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; RV64IDINX-NEXT: li a2, 1151
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; RV64IDINX-NEXT: and a1, s1, a1
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; RV64IDINX-NEXT: slli a2, a2, 52
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; RV64IDINX-NEXT: addi a2, a2, -1
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; RV64IDINX-NEXT: flt.d a2, a2, s0
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; RV64IDINX-NEXT: neg a2, a2
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; RV64IDINX-NEXT: or a0, a2, a0
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; RV64IDINX-NEXT: or a1, a2, a1
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; RV64IDINX-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
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; RV64IDINX-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
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; RV64IDINX-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
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; RV64IDINX-NEXT: addi sp, sp, 32
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; RV64IDINX-NEXT: ret
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%1 = tail call i128 @llvm.fptoui.sat.i128.f64(double %a)
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ret i128 %1
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}
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