derek.holloway
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48 lines
1.7 KiB
LLVM
48 lines
1.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=riscv64 -mattr=+zfhmin \
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; RUN: -verify-machineinstrs -target-abi lp64f | \
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; RUN: FileCheck -check-prefix=CHECKIZFHMIN %s
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; RUN: llc < %s -mtriple=riscv64 -mattr=+d \
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; RUN: -mattr=+zfhmin -verify-machineinstrs -target-abi lp64d | \
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; RUN: FileCheck -check-prefix=CHECKIZFHMIN %s
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; RUN: llc < %s -mtriple=riscv64 -mattr=+zhinxmin \
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; RUN: -verify-machineinstrs -target-abi lp64 | \
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; RUN: FileCheck -check-prefix=CHECKIZHINXMIN %s
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; RUN: llc < %s -mtriple=riscv64 -mattr=+zdinx \
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; RUN: -mattr=+zhinxmin -verify-machineinstrs -target-abi lp64 | \
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; RUN: FileCheck -check-prefix=CHECKIZHINXMIN %s
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; These intrinsics require half and i64 to be legal types.
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define i64 @llrint_f16(half %a) nounwind {
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; CHECKIZFHMIN-LABEL: llrint_f16:
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; CHECKIZFHMIN: # %bb.0:
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; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa0
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; CHECKIZFHMIN-NEXT: fcvt.l.s a0, fa5
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; CHECKIZFHMIN-NEXT: ret
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;
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; CHECKIZHINXMIN-LABEL: llrint_f16:
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; CHECKIZHINXMIN: # %bb.0:
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; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a0
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; CHECKIZHINXMIN-NEXT: fcvt.l.s a0, a0
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; CHECKIZHINXMIN-NEXT: ret
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%1 = call i64 @llvm.llrint.i64.f16(half %a)
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ret i64 %1
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}
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define i64 @llround_f16(half %a) nounwind {
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; CHECKIZFHMIN-LABEL: llround_f16:
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; CHECKIZFHMIN: # %bb.0:
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; CHECKIZFHMIN-NEXT: fcvt.s.h fa5, fa0
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; CHECKIZFHMIN-NEXT: fcvt.l.s a0, fa5, rmm
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; CHECKIZFHMIN-NEXT: ret
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;
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; CHECKIZHINXMIN-LABEL: llround_f16:
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; CHECKIZHINXMIN: # %bb.0:
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; CHECKIZHINXMIN-NEXT: fcvt.s.h a0, a0
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; CHECKIZHINXMIN-NEXT: fcvt.l.s a0, a0, rmm
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; CHECKIZHINXMIN-NEXT: ret
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%1 = call i64 @llvm.llround.i64.f16(half %a)
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ret i64 %1
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}
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