derek.holloway
7502bf64a4
CodeQL / Analyze (actions) (push) Canceled after 0s
CodeQL / Analyze (python) (push) Canceled after 0s
pre-commit / pre-commit (push) Canceled after 0s
Multi-Arch CI / setup (push) Canceled after 0s
Publish build_manylinux_x86_64 images / publish_build_manylinux_x86_64 (push) Canceled after 0s
Setup (Multi-Arch) / setup (push) Canceled after 0s
Multi-Arch CI / Linux::${{ fromJSON(needs.setup.outputs.linux_build_config || '{}').build_variant_label || 'skip' }} (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish no_rocm_image_ubi10 image / publish_no_rocm_image_ubi10 (push) Canceled after 0s
Multi-Arch CI / Windows::${{ fromJSON(needs.setup.outputs.windows_build_config || '{}').build_variant_label || 'skip' }} (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Multi-Arch CI / Manifest Diff (push) Canceled after 0s
TheRock Manifest Diff Report / Generate Manifest Diff Report (push) Canceled after 0s
Multi-Arch CI / CI Summary (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04 (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04_ocl_rt images / publish_no_rocm_image_ubuntu24_04_ocl_rt (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_rocgdb (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04_rocgdb images / publish_no_rocm_image_ubuntu24_04_rocgdb (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_ocl_rt (push) Canceled after 0s
Publish TheRock Docker image / build-and-push-image (push) Canceled after 0s
Unit Tests / Unit Tests :: ubuntu-24.04 (push) Canceled after 0s
Unit Tests / Unit Tests :: windows-2022 (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_media (push) Canceled after 0s
Unit Tests / Unit Tests Summary (push) Canceled after 0s
Publish no_rocm_image_ubuntu24_04 images / publish_no_rocm_image_ubuntu24_04_openmpi (push) Canceled after 0s
108 lines
3.7 KiB
LLVM
108 lines
3.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
|
; RUN: llc -mtriple=riscv64 -mattr=+m,+v -O2 < %s \
|
|
; RUN: | FileCheck %s -check-prefix=RV64IV
|
|
|
|
define <vscale x 1 x i64> @access_fixed_object(ptr %val) {
|
|
; RV64IV-LABEL: access_fixed_object:
|
|
; RV64IV: # %bb.0:
|
|
; RV64IV-NEXT: addi sp, sp, -528
|
|
; RV64IV-NEXT: .cfi_def_cfa_offset 528
|
|
; RV64IV-NEXT: addi a1, sp, 8
|
|
; RV64IV-NEXT: vl1re64.v v8, (a1)
|
|
; RV64IV-NEXT: ld a1, 520(sp)
|
|
; RV64IV-NEXT: sd a1, 0(a0)
|
|
; RV64IV-NEXT: addi sp, sp, 528
|
|
; RV64IV-NEXT: .cfi_def_cfa_offset 0
|
|
; RV64IV-NEXT: ret
|
|
%local = alloca i64
|
|
%array = alloca [64 x i64]
|
|
%v = load <vscale x 1 x i64>, ptr %array
|
|
%len = load i64, ptr %local
|
|
store i64 %len, ptr %val
|
|
ret <vscale x 1 x i64> %v
|
|
}
|
|
|
|
define <vscale x 1 x i64> @access_fixed_and_vector_objects(ptr %val) {
|
|
; RV64IV-LABEL: access_fixed_and_vector_objects:
|
|
; RV64IV: # %bb.0:
|
|
; RV64IV-NEXT: addi sp, sp, -528
|
|
; RV64IV-NEXT: .cfi_def_cfa_offset 528
|
|
; RV64IV-NEXT: csrr a0, vlenb
|
|
; RV64IV-NEXT: sub sp, sp, a0
|
|
; RV64IV-NEXT: .cfi_escape 0x0f, 0x0e, 0x72, 0x00, 0x11, 0x90, 0x04, 0x22, 0x11, 0x01, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 528 + 1 * vlenb
|
|
; RV64IV-NEXT: ld a0, 520(sp)
|
|
; RV64IV-NEXT: addi a1, sp, 8
|
|
; RV64IV-NEXT: addi a2, sp, 528
|
|
; RV64IV-NEXT: vsetvli zero, a0, e64, m1, ta, ma
|
|
; RV64IV-NEXT: vle64.v v8, (a2)
|
|
; RV64IV-NEXT: vle64.v v9, (a1)
|
|
; RV64IV-NEXT: vadd.vv v8, v9, v8
|
|
; RV64IV-NEXT: csrr a0, vlenb
|
|
; RV64IV-NEXT: add sp, sp, a0
|
|
; RV64IV-NEXT: .cfi_def_cfa sp, 528
|
|
; RV64IV-NEXT: addi sp, sp, 528
|
|
; RV64IV-NEXT: .cfi_def_cfa_offset 0
|
|
; RV64IV-NEXT: ret
|
|
%local = alloca i64
|
|
%vector = alloca <vscale x 1 x i64>
|
|
%array = alloca [64 x i64]
|
|
%v1 = load <vscale x 1 x i64>, ptr %array
|
|
%v2 = load <vscale x 1 x i64>, ptr %vector
|
|
%len = load i64, ptr %local
|
|
|
|
%a = call <vscale x 1 x i64> @llvm.riscv.vadd.nxv1i64.nxv1i64(
|
|
<vscale x 1 x i64> poison,
|
|
<vscale x 1 x i64> %v1,
|
|
<vscale x 1 x i64> %v2,
|
|
i64 %len)
|
|
|
|
ret <vscale x 1 x i64> %a
|
|
}
|
|
|
|
define <vscale x 1 x i64> @probe_fixed_and_vector_objects(ptr %val, <vscale x 1 x i64> %dummy) "probe-stack"="inline-asm" {
|
|
; RV64IV-LABEL: probe_fixed_and_vector_objects:
|
|
; RV64IV: # %bb.0:
|
|
; RV64IV-NEXT: addi sp, sp, -528
|
|
; RV64IV-NEXT: .cfi_def_cfa_offset 528
|
|
; RV64IV-NEXT: csrr t1, vlenb
|
|
; RV64IV-NEXT: .cfi_def_cfa t1, -8
|
|
; RV64IV-NEXT: lui t2, 1
|
|
; RV64IV-NEXT: .LBB2_1: # =>This Inner Loop Header: Depth=1
|
|
; RV64IV-NEXT: sub sp, sp, t2
|
|
; RV64IV-NEXT: sd zero, 0(sp)
|
|
; RV64IV-NEXT: sub t1, t1, t2
|
|
; RV64IV-NEXT: bge t1, t2, .LBB2_1
|
|
; RV64IV-NEXT: # %bb.2:
|
|
; RV64IV-NEXT: .cfi_def_cfa_register sp
|
|
; RV64IV-NEXT: sub sp, sp, t1
|
|
; RV64IV-NEXT: .cfi_escape 0x0f, 0x0e, 0x72, 0x00, 0x11, 0x90, 0x04, 0x22, 0x11, 0x01, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 528 + 1 * vlenb
|
|
; RV64IV-NEXT: ld a0, 520(sp)
|
|
; RV64IV-NEXT: addi a1, sp, 8
|
|
; RV64IV-NEXT: addi a2, sp, 528
|
|
; RV64IV-NEXT: vsetvli zero, a0, e64, m1, ta, ma
|
|
; RV64IV-NEXT: vle64.v v9, (a2)
|
|
; RV64IV-NEXT: vle64.v v10, (a1)
|
|
; RV64IV-NEXT: vsetvli zero, zero, e64, m1, tu, ma
|
|
; RV64IV-NEXT: vadd.vv v8, v10, v9
|
|
; RV64IV-NEXT: csrr a0, vlenb
|
|
; RV64IV-NEXT: add sp, sp, a0
|
|
; RV64IV-NEXT: .cfi_def_cfa sp, 528
|
|
; RV64IV-NEXT: addi sp, sp, 528
|
|
; RV64IV-NEXT: .cfi_def_cfa_offset 0
|
|
; RV64IV-NEXT: ret
|
|
%local = alloca i64
|
|
%vector = alloca <vscale x 1 x i64>
|
|
%array = alloca [64 x i64]
|
|
%v1 = load <vscale x 1 x i64>, ptr %array
|
|
%v2 = load <vscale x 1 x i64>, ptr %vector
|
|
%len = load i64, ptr %local
|
|
|
|
%a = call <vscale x 1 x i64> @llvm.riscv.vadd.nxv1i64.nxv1i64(
|
|
<vscale x 1 x i64> %dummy,
|
|
<vscale x 1 x i64> %v1,
|
|
<vscale x 1 x i64> %v2,
|
|
i64 %len)
|
|
|
|
ret <vscale x 1 x i64> %a
|
|
}
|