derek.holloway
7502bf64a4
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330 lines
11 KiB
LLVM
330 lines
11 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -target-abi=ilp32d -mattr=+v,+zvfh,+f,+d -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-RV32
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; RUN: llc -mtriple=riscv64 -target-abi=lp64d -mattr=+v,+zvfh,+f,+d -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-RV64,RV64-ZVFH
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; RUN: llc -mtriple=riscv64 -target-abi=lp64d -mattr=+v,+zvfhmin,+f,+d -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-RV64,RV64-ZVFHMIN,RV64-ZVFHMIN-NOZFHMIN
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; RUN: llc -mtriple=riscv64 -target-abi=lp64d -mattr=+v,+zfhmin,+zvfhmin,+f,+d -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,CHECK-RV64,RV64-ZVFHMIN,RV64_ZVFHMIN-ZFHMIN
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define void @splat_v8f16(ptr %x, half %y) {
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; CHECK-RV32-LABEL: splat_v8f16:
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; CHECK-RV32: # %bb.0:
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; CHECK-RV32-NEXT: vsetivli zero, 8, e16, m1, ta, ma
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; CHECK-RV32-NEXT: vfmv.v.f v8, fa0
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; CHECK-RV32-NEXT: vse16.v v8, (a0)
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; CHECK-RV32-NEXT: ret
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;
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; RV64-ZVFH-LABEL: splat_v8f16:
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; RV64-ZVFH: # %bb.0:
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; RV64-ZVFH-NEXT: vsetivli zero, 8, e16, m1, ta, ma
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; RV64-ZVFH-NEXT: vfmv.v.f v8, fa0
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; RV64-ZVFH-NEXT: vse16.v v8, (a0)
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; RV64-ZVFH-NEXT: ret
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;
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; RV64-ZVFHMIN-NOZFHMIN-LABEL: splat_v8f16:
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; RV64-ZVFHMIN-NOZFHMIN: # %bb.0:
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; RV64-ZVFHMIN-NOZFHMIN-NEXT: fmv.x.w a1, fa0
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; RV64-ZVFHMIN-NOZFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma
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; RV64-ZVFHMIN-NOZFHMIN-NEXT: vmv.v.x v8, a1
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; RV64-ZVFHMIN-NOZFHMIN-NEXT: vse16.v v8, (a0)
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; RV64-ZVFHMIN-NOZFHMIN-NEXT: ret
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;
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; RV64_ZVFHMIN-ZFHMIN-LABEL: splat_v8f16:
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; RV64_ZVFHMIN-ZFHMIN: # %bb.0:
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; RV64_ZVFHMIN-ZFHMIN-NEXT: fmv.x.h a1, fa0
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; RV64_ZVFHMIN-ZFHMIN-NEXT: vsetivli zero, 8, e16, m1, ta, ma
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; RV64_ZVFHMIN-ZFHMIN-NEXT: vmv.v.x v8, a1
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; RV64_ZVFHMIN-ZFHMIN-NEXT: vse16.v v8, (a0)
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; RV64_ZVFHMIN-ZFHMIN-NEXT: ret
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%a = insertelement <8 x half> poison, half %y, i32 0
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%b = shufflevector <8 x half> %a, <8 x half> poison, <8 x i32> zeroinitializer
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store <8 x half> %b, ptr %x
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ret void
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}
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define void @splat_v4f32(ptr %x, float %y) {
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; CHECK-LABEL: splat_v4f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
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; CHECK-NEXT: vfmv.v.f v8, fa0
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; CHECK-NEXT: vse32.v v8, (a0)
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; CHECK-NEXT: ret
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%a = insertelement <4 x float> poison, float %y, i32 0
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%b = shufflevector <4 x float> %a, <4 x float> poison, <4 x i32> zeroinitializer
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store <4 x float> %b, ptr %x
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ret void
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}
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define void @splat_v2f64(ptr %x, double %y) {
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; CHECK-LABEL: splat_v2f64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, ma
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; CHECK-NEXT: vfmv.v.f v8, fa0
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; CHECK-NEXT: vse64.v v8, (a0)
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; CHECK-NEXT: ret
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%a = insertelement <2 x double> poison, double %y, i32 0
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%b = shufflevector <2 x double> %a, <2 x double> poison, <2 x i32> zeroinitializer
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store <2 x double> %b, ptr %x
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ret void
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}
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define void @splat_16f16(ptr %x, half %y) {
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; CHECK-RV32-LABEL: splat_16f16:
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; CHECK-RV32: # %bb.0:
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; CHECK-RV32-NEXT: vsetivli zero, 16, e16, m2, ta, ma
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; CHECK-RV32-NEXT: vfmv.v.f v8, fa0
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; CHECK-RV32-NEXT: vse16.v v8, (a0)
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; CHECK-RV32-NEXT: ret
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;
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; RV64-ZVFH-LABEL: splat_16f16:
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; RV64-ZVFH: # %bb.0:
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; RV64-ZVFH-NEXT: vsetivli zero, 16, e16, m2, ta, ma
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; RV64-ZVFH-NEXT: vfmv.v.f v8, fa0
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; RV64-ZVFH-NEXT: vse16.v v8, (a0)
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; RV64-ZVFH-NEXT: ret
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;
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; RV64-ZVFHMIN-NOZFHMIN-LABEL: splat_16f16:
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; RV64-ZVFHMIN-NOZFHMIN: # %bb.0:
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; RV64-ZVFHMIN-NOZFHMIN-NEXT: fmv.x.w a1, fa0
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; RV64-ZVFHMIN-NOZFHMIN-NEXT: vsetivli zero, 16, e16, m2, ta, ma
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; RV64-ZVFHMIN-NOZFHMIN-NEXT: vmv.v.x v8, a1
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; RV64-ZVFHMIN-NOZFHMIN-NEXT: vse16.v v8, (a0)
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; RV64-ZVFHMIN-NOZFHMIN-NEXT: ret
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;
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; RV64_ZVFHMIN-ZFHMIN-LABEL: splat_16f16:
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; RV64_ZVFHMIN-ZFHMIN: # %bb.0:
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; RV64_ZVFHMIN-ZFHMIN-NEXT: fmv.x.h a1, fa0
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; RV64_ZVFHMIN-ZFHMIN-NEXT: vsetivli zero, 16, e16, m2, ta, ma
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; RV64_ZVFHMIN-ZFHMIN-NEXT: vmv.v.x v8, a1
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; RV64_ZVFHMIN-ZFHMIN-NEXT: vse16.v v8, (a0)
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; RV64_ZVFHMIN-ZFHMIN-NEXT: ret
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%a = insertelement <16 x half> poison, half %y, i32 0
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%b = shufflevector <16 x half> %a, <16 x half> poison, <16 x i32> zeroinitializer
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store <16 x half> %b, ptr %x
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ret void
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}
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define void @splat_v8f32(ptr %x, float %y) {
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; CHECK-LABEL: splat_v8f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma
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; CHECK-NEXT: vfmv.v.f v8, fa0
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; CHECK-NEXT: vse32.v v8, (a0)
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; CHECK-NEXT: ret
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%a = insertelement <8 x float> poison, float %y, i32 0
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%b = shufflevector <8 x float> %a, <8 x float> poison, <8 x i32> zeroinitializer
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store <8 x float> %b, ptr %x
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ret void
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}
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define void @splat_v4f64(ptr %x, double %y) {
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; CHECK-LABEL: splat_v4f64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma
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; CHECK-NEXT: vfmv.v.f v8, fa0
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; CHECK-NEXT: vse64.v v8, (a0)
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; CHECK-NEXT: ret
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%a = insertelement <4 x double> poison, double %y, i32 0
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%b = shufflevector <4 x double> %a, <4 x double> poison, <4 x i32> zeroinitializer
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store <4 x double> %b, ptr %x
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ret void
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}
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define void @splat_64f16(ptr %x, half %y) {
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; CHECK-RV32-LABEL: splat_64f16:
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; CHECK-RV32: # %bb.0:
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; CHECK-RV32-NEXT: li a1, 64
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; CHECK-RV32-NEXT: vsetvli zero, a1, e16, m8, ta, ma
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; CHECK-RV32-NEXT: vfmv.v.f v8, fa0
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; CHECK-RV32-NEXT: vse16.v v8, (a0)
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; CHECK-RV32-NEXT: ret
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;
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; RV64-ZVFH-LABEL: splat_64f16:
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; RV64-ZVFH: # %bb.0:
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; RV64-ZVFH-NEXT: li a1, 64
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; RV64-ZVFH-NEXT: vsetvli zero, a1, e16, m8, ta, ma
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; RV64-ZVFH-NEXT: vfmv.v.f v8, fa0
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; RV64-ZVFH-NEXT: vse16.v v8, (a0)
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; RV64-ZVFH-NEXT: ret
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;
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; RV64-ZVFHMIN-NOZFHMIN-LABEL: splat_64f16:
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; RV64-ZVFHMIN-NOZFHMIN: # %bb.0:
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; RV64-ZVFHMIN-NOZFHMIN-NEXT: fmv.x.w a1, fa0
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; RV64-ZVFHMIN-NOZFHMIN-NEXT: li a2, 64
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; RV64-ZVFHMIN-NOZFHMIN-NEXT: vsetvli zero, a2, e16, m8, ta, ma
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; RV64-ZVFHMIN-NOZFHMIN-NEXT: vmv.v.x v8, a1
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; RV64-ZVFHMIN-NOZFHMIN-NEXT: vse16.v v8, (a0)
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; RV64-ZVFHMIN-NOZFHMIN-NEXT: ret
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;
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; RV64_ZVFHMIN-ZFHMIN-LABEL: splat_64f16:
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; RV64_ZVFHMIN-ZFHMIN: # %bb.0:
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; RV64_ZVFHMIN-ZFHMIN-NEXT: fmv.x.h a1, fa0
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; RV64_ZVFHMIN-ZFHMIN-NEXT: li a2, 64
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; RV64_ZVFHMIN-ZFHMIN-NEXT: vsetvli zero, a2, e16, m8, ta, ma
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; RV64_ZVFHMIN-ZFHMIN-NEXT: vmv.v.x v8, a1
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; RV64_ZVFHMIN-ZFHMIN-NEXT: vse16.v v8, (a0)
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; RV64_ZVFHMIN-ZFHMIN-NEXT: ret
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%a = insertelement <64 x half> poison, half %y, i32 0
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%b = shufflevector <64 x half> %a, <64 x half> poison, <64 x i32> zeroinitializer
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store <64 x half> %b, ptr %x
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ret void
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}
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define void @splat_zero_v8f16(ptr %x) {
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; CHECK-LABEL: splat_zero_v8f16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma
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; CHECK-NEXT: vmv.v.i v8, 0
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; CHECK-NEXT: vse16.v v8, (a0)
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; CHECK-NEXT: ret
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store <8 x half> splat (half 0.0), ptr %x
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ret void
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}
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define void @splat_zero_v4f32(ptr %x) {
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; CHECK-LABEL: splat_zero_v4f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
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; CHECK-NEXT: vmv.v.i v8, 0
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; CHECK-NEXT: vse32.v v8, (a0)
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; CHECK-NEXT: ret
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store <4 x float> splat (float 0.0), ptr %x
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ret void
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}
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define void @splat_zero_v2f64(ptr %x) {
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; CHECK-LABEL: splat_zero_v2f64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 2, e64, m1, ta, ma
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; CHECK-NEXT: vmv.v.i v8, 0
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; CHECK-NEXT: vse64.v v8, (a0)
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; CHECK-NEXT: ret
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store <2 x double> splat (double 0.0), ptr %x
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ret void
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}
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define void @splat_zero_16f16(ptr %x) {
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; CHECK-LABEL: splat_zero_16f16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma
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; CHECK-NEXT: vmv.v.i v8, 0
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; CHECK-NEXT: vse16.v v8, (a0)
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; CHECK-NEXT: ret
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store <16 x half> splat (half 0.0), ptr %x
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ret void
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}
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define void @splat_zero_v8f32(ptr %x) {
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; CHECK-LABEL: splat_zero_v8f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma
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; CHECK-NEXT: vmv.v.i v8, 0
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; CHECK-NEXT: vse32.v v8, (a0)
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; CHECK-NEXT: ret
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store <8 x float> splat (float 0.0), ptr %x
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ret void
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}
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define void @splat_zero_v4f64(ptr %x) {
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; CHECK-LABEL: splat_zero_v4f64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma
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; CHECK-NEXT: vmv.v.i v8, 0
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; CHECK-NEXT: vse64.v v8, (a0)
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; CHECK-NEXT: ret
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store <4 x double> splat (double 0.0), ptr %x
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ret void
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}
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define void @splat_negzero_v8f16(ptr %x) {
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; CHECK-LABEL: splat_negzero_v8f16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lui a1, 1048568
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; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma
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; CHECK-NEXT: vmv.v.x v8, a1
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; CHECK-NEXT: vse16.v v8, (a0)
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; CHECK-NEXT: ret
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store <8 x half> splat (half -0.0), ptr %x
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ret void
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}
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define void @splat_negzero_v4f32(ptr %x) {
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; CHECK-LABEL: splat_negzero_v4f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lui a1, 524288
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; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
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; CHECK-NEXT: vmv.v.x v8, a1
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; CHECK-NEXT: vse32.v v8, (a0)
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; CHECK-NEXT: ret
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store <4 x float> splat (float -0.0), ptr %x
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ret void
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}
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define void @splat_negzero_v2f64(ptr %x) {
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; CHECK-RV32-LABEL: splat_negzero_v2f64:
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; CHECK-RV32: # %bb.0:
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; CHECK-RV32-NEXT: fcvt.d.w fa5, zero
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; CHECK-RV32-NEXT: fneg.d fa5, fa5
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; CHECK-RV32-NEXT: vsetivli zero, 2, e64, m1, ta, ma
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; CHECK-RV32-NEXT: vfmv.v.f v8, fa5
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; CHECK-RV32-NEXT: vse64.v v8, (a0)
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; CHECK-RV32-NEXT: ret
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;
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; CHECK-RV64-LABEL: splat_negzero_v2f64:
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; CHECK-RV64: # %bb.0:
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; CHECK-RV64-NEXT: li a1, -1
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; CHECK-RV64-NEXT: slli a1, a1, 63
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; CHECK-RV64-NEXT: vsetivli zero, 2, e64, m1, ta, ma
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; CHECK-RV64-NEXT: vmv.v.x v8, a1
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; CHECK-RV64-NEXT: vse64.v v8, (a0)
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; CHECK-RV64-NEXT: ret
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store <2 x double> splat (double -0.0), ptr %x
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ret void
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}
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define void @splat_negzero_16f16(ptr %x) {
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; CHECK-LABEL: splat_negzero_16f16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lui a1, 1048568
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; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma
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; CHECK-NEXT: vmv.v.x v8, a1
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; CHECK-NEXT: vse16.v v8, (a0)
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; CHECK-NEXT: ret
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store <16 x half> splat (half -0.0), ptr %x
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ret void
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}
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define void @splat_negzero_v8f32(ptr %x) {
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; CHECK-LABEL: splat_negzero_v8f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lui a1, 524288
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; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma
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; CHECK-NEXT: vmv.v.x v8, a1
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; CHECK-NEXT: vse32.v v8, (a0)
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; CHECK-NEXT: ret
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store <8 x float> splat (float -0.0), ptr %x
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ret void
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}
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define void @splat_negzero_v4f64(ptr %x) {
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; CHECK-RV32-LABEL: splat_negzero_v4f64:
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; CHECK-RV32: # %bb.0:
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; CHECK-RV32-NEXT: fcvt.d.w fa5, zero
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; CHECK-RV32-NEXT: fneg.d fa5, fa5
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; CHECK-RV32-NEXT: vsetivli zero, 4, e64, m2, ta, ma
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; CHECK-RV32-NEXT: vfmv.v.f v8, fa5
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; CHECK-RV32-NEXT: vse64.v v8, (a0)
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; CHECK-RV32-NEXT: ret
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;
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; CHECK-RV64-LABEL: splat_negzero_v4f64:
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; CHECK-RV64: # %bb.0:
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; CHECK-RV64-NEXT: li a1, -1
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; CHECK-RV64-NEXT: slli a1, a1, 63
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; CHECK-RV64-NEXT: vsetivli zero, 4, e64, m2, ta, ma
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|
; CHECK-RV64-NEXT: vmv.v.x v8, a1
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|
; CHECK-RV64-NEXT: vse64.v v8, (a0)
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; CHECK-RV64-NEXT: ret
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store <4 x double> splat (double -0.0), ptr %x
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ret void
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|
}
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;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
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; RV64-ZVFHMIN: {{.*}}
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