derek.holloway
7502bf64a4
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89 lines
3.0 KiB
LLVM
89 lines
3.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s -mtriple=riscv32 -mattr=+v -verify-machineinstrs | FileCheck %s
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; RUN: llc < %s -mtriple=riscv64 -mattr=+v -verify-machineinstrs | FileCheck %s
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define <8 x float> @fpext_v8bf16(<8 x bfloat> %x) {
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; CHECK-LABEL: fpext_v8bf16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fmv.x.w a0, fa0
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; CHECK-NEXT: fmv.x.w a1, fa1
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; CHECK-NEXT: fmv.x.w a2, fa2
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; CHECK-NEXT: fmv.x.w a3, fa3
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; CHECK-NEXT: fmv.x.w a4, fa4
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; CHECK-NEXT: fmv.x.w a5, fa5
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; CHECK-NEXT: fmv.x.w a6, fa6
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; CHECK-NEXT: fmv.x.w a7, fa7
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; CHECK-NEXT: slli a7, a7, 16
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; CHECK-NEXT: slli a6, a6, 16
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; CHECK-NEXT: slli a5, a5, 16
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; CHECK-NEXT: slli a4, a4, 16
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; CHECK-NEXT: slli a3, a3, 16
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; CHECK-NEXT: slli a2, a2, 16
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; CHECK-NEXT: slli a1, a1, 16
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; CHECK-NEXT: slli a0, a0, 16
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; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
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; CHECK-NEXT: vmv.s.x v8, a7
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; CHECK-NEXT: vmv.s.x v9, a6
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; CHECK-NEXT: vmv.s.x v11, a5
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; CHECK-NEXT: vmv.s.x v10, a4
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; CHECK-NEXT: vmv.s.x v12, a3
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; CHECK-NEXT: vmv.s.x v13, a2
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; CHECK-NEXT: vslideup.vi v9, v8, 1
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; CHECK-NEXT: vmv.s.x v14, a1
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; CHECK-NEXT: vslideup.vi v10, v11, 1
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; CHECK-NEXT: vslideup.vi v13, v12, 1
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; CHECK-NEXT: vmv.s.x v8, a0
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; CHECK-NEXT: vslideup.vi v8, v14, 1
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; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
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; CHECK-NEXT: vslideup.vi v10, v9, 2
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; CHECK-NEXT: vslideup.vi v8, v13, 2
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; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma
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; CHECK-NEXT: vslideup.vi v8, v10, 4
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; CHECK-NEXT: ret
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%y = fpext <8 x bfloat> %x to <8 x float>
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ret <8 x float> %y
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}
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define <8 x float> @fpext_v8f16(<8 x bfloat> %x) {
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; CHECK-LABEL: fpext_v8f16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: fmv.x.w a0, fa0
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; CHECK-NEXT: fmv.x.w a1, fa1
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; CHECK-NEXT: fmv.x.w a2, fa2
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; CHECK-NEXT: fmv.x.w a3, fa3
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; CHECK-NEXT: fmv.x.w a4, fa4
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; CHECK-NEXT: fmv.x.w a5, fa5
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; CHECK-NEXT: fmv.x.w a6, fa6
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; CHECK-NEXT: fmv.x.w a7, fa7
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; CHECK-NEXT: slli a7, a7, 16
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; CHECK-NEXT: slli a6, a6, 16
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; CHECK-NEXT: slli a5, a5, 16
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; CHECK-NEXT: slli a4, a4, 16
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; CHECK-NEXT: slli a3, a3, 16
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; CHECK-NEXT: slli a2, a2, 16
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; CHECK-NEXT: slli a1, a1, 16
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; CHECK-NEXT: slli a0, a0, 16
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; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
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; CHECK-NEXT: vmv.s.x v8, a7
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; CHECK-NEXT: vmv.s.x v9, a6
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; CHECK-NEXT: vmv.s.x v11, a5
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; CHECK-NEXT: vmv.s.x v10, a4
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; CHECK-NEXT: vmv.s.x v12, a3
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; CHECK-NEXT: vmv.s.x v13, a2
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; CHECK-NEXT: vslideup.vi v9, v8, 1
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; CHECK-NEXT: vmv.s.x v14, a1
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; CHECK-NEXT: vslideup.vi v10, v11, 1
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; CHECK-NEXT: vslideup.vi v13, v12, 1
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; CHECK-NEXT: vmv.s.x v8, a0
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; CHECK-NEXT: vslideup.vi v8, v14, 1
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; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
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; CHECK-NEXT: vslideup.vi v10, v9, 2
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; CHECK-NEXT: vslideup.vi v8, v13, 2
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; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma
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; CHECK-NEXT: vslideup.vi v8, v10, 4
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; CHECK-NEXT: ret
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%y = fpext <8 x bfloat> %x to <8 x float>
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ret <8 x float> %y
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}
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