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TheRock/compiler/amd-llvm/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmadd-sdnode.ll
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Flatten subprojects into a single base monorepo
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=riscv32 -mattr=+experimental-zvfbfa,+v \
; RUN: -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -mtriple=riscv64 -mattr=+experimental-zvfbfa,+v \
; RUN: -verify-machineinstrs < %s | FileCheck %s
define <1 x bfloat> @vfmadd_vv_v1bf16(<1 x bfloat> %va, <1 x bfloat> %vb, <1 x bfloat> %vc) {
; CHECK-LABEL: vfmadd_vv_v1bf16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 1, e16alt, mf4, ta, ma
; CHECK-NEXT: vfmadd.vv v8, v9, v10
; CHECK-NEXT: ret
%vd = call <1 x bfloat> @llvm.fma.v1bf16(<1 x bfloat> %va, <1 x bfloat> %vb, <1 x bfloat> %vc)
ret <1 x bfloat> %vd
}
define <1 x bfloat> @vfmadd_vf_v1bf16(<1 x bfloat> %va, <1 x bfloat> %vb, bfloat %c) {
; CHECK-LABEL: vfmadd_vf_v1bf16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 1, e16alt, mf4, ta, ma
; CHECK-NEXT: vfmadd.vf v8, fa0, v9
; CHECK-NEXT: ret
%head = insertelement <1 x bfloat> poison, bfloat %c, i32 0
%splat = shufflevector <1 x bfloat> %head, <1 x bfloat> poison, <1 x i32> zeroinitializer
%vd = call <1 x bfloat> @llvm.fma.v1bf16(<1 x bfloat> %va, <1 x bfloat> %splat, <1 x bfloat> %vb)
ret <1 x bfloat> %vd
}
define <2 x bfloat> @vfmadd_vv_v2bf16(<2 x bfloat> %va, <2 x bfloat> %vb, <2 x bfloat> %vc) {
; CHECK-LABEL: vfmadd_vv_v2bf16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 2, e16alt, mf4, ta, ma
; CHECK-NEXT: vfmadd.vv v8, v9, v10
; CHECK-NEXT: ret
%vd = call <2 x bfloat> @llvm.fma.v2bf16(<2 x bfloat> %va, <2 x bfloat> %vb, <2 x bfloat> %vc)
ret <2 x bfloat> %vd
}
define <2 x bfloat> @vfmadd_vf_v2bf16(<2 x bfloat> %va, <2 x bfloat> %vb, bfloat %c) {
; CHECK-LABEL: vfmadd_vf_v2bf16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 2, e16alt, mf4, ta, ma
; CHECK-NEXT: vfmadd.vf v8, fa0, v9
; CHECK-NEXT: ret
%head = insertelement <2 x bfloat> poison, bfloat %c, i32 0
%splat = shufflevector <2 x bfloat> %head, <2 x bfloat> poison, <2 x i32> zeroinitializer
%vd = call <2 x bfloat> @llvm.fma.v2bf16(<2 x bfloat> %va, <2 x bfloat> %splat, <2 x bfloat> %vb)
ret <2 x bfloat> %vd
}
define <4 x bfloat> @vfmadd_vv_v4bf16(<4 x bfloat> %va, <4 x bfloat> %vb, <4 x bfloat> %vc) {
; CHECK-LABEL: vfmadd_vv_v4bf16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 4, e16alt, mf2, ta, ma
; CHECK-NEXT: vfmadd.vv v8, v9, v10
; CHECK-NEXT: ret
%vd = call <4 x bfloat> @llvm.fma.v4bf16(<4 x bfloat> %va, <4 x bfloat> %vb, <4 x bfloat> %vc)
ret <4 x bfloat> %vd
}
define <4 x bfloat> @vfmadd_vf_v4bf16(<4 x bfloat> %va, <4 x bfloat> %vb, bfloat %c) {
; CHECK-LABEL: vfmadd_vf_v4bf16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 4, e16alt, mf2, ta, ma
; CHECK-NEXT: vfmadd.vf v8, fa0, v9
; CHECK-NEXT: ret
%head = insertelement <4 x bfloat> poison, bfloat %c, i32 0
%splat = shufflevector <4 x bfloat> %head, <4 x bfloat> poison, <4 x i32> zeroinitializer
%vd = call <4 x bfloat> @llvm.fma.v4bf16(<4 x bfloat> %va, <4 x bfloat> %splat, <4 x bfloat> %vb)
ret <4 x bfloat> %vd
}
define <8 x bfloat> @vfmadd_vv_v8bf16(<8 x bfloat> %va, <8 x bfloat> %vb, <8 x bfloat> %vc) {
; CHECK-LABEL: vfmadd_vv_v8bf16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 8, e16alt, m1, ta, ma
; CHECK-NEXT: vfmadd.vv v8, v9, v10
; CHECK-NEXT: ret
%vd = call <8 x bfloat> @llvm.fma.v8bf16(<8 x bfloat> %va, <8 x bfloat> %vb, <8 x bfloat> %vc)
ret <8 x bfloat> %vd
}
define <8 x bfloat> @vfmadd_vf_v8bf16(<8 x bfloat> %va, <8 x bfloat> %vb, bfloat %c) {
; CHECK-LABEL: vfmadd_vf_v8bf16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 8, e16alt, m1, ta, ma
; CHECK-NEXT: vfmadd.vf v8, fa0, v9
; CHECK-NEXT: ret
%head = insertelement <8 x bfloat> poison, bfloat %c, i32 0
%splat = shufflevector <8 x bfloat> %head, <8 x bfloat> poison, <8 x i32> zeroinitializer
%vd = call <8 x bfloat> @llvm.fma.v8bf16(<8 x bfloat> %va, <8 x bfloat> %splat, <8 x bfloat> %vb)
ret <8 x bfloat> %vd
}
define <16 x bfloat> @vfmadd_vv_v16bf16(<16 x bfloat> %va, <16 x bfloat> %vb, <16 x bfloat> %vc) {
; CHECK-LABEL: vfmadd_vv_v16bf16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 16, e16alt, m2, ta, ma
; CHECK-NEXT: vfmadd.vv v8, v10, v12
; CHECK-NEXT: ret
%vd = call <16 x bfloat> @llvm.fma.v16bf16(<16 x bfloat> %va, <16 x bfloat> %vb, <16 x bfloat> %vc)
ret <16 x bfloat> %vd
}
define <16 x bfloat> @vfmadd_vf_v16bf16(<16 x bfloat> %va, <16 x bfloat> %vb, bfloat %c) {
; CHECK-LABEL: vfmadd_vf_v16bf16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 16, e16alt, m2, ta, ma
; CHECK-NEXT: vfmadd.vf v8, fa0, v10
; CHECK-NEXT: ret
%head = insertelement <16 x bfloat> poison, bfloat %c, i32 0
%splat = shufflevector <16 x bfloat> %head, <16 x bfloat> poison, <16 x i32> zeroinitializer
%vd = call <16 x bfloat> @llvm.fma.v16bf16(<16 x bfloat> %va, <16 x bfloat> %splat, <16 x bfloat> %vb)
ret <16 x bfloat> %vd
}
define <1 x bfloat> @vfmacc_vv_v1bf16(<1 x bfloat> %va, <1 x bfloat> %vb, <1 x bfloat> %vc) {
; CHECK-LABEL: vfmacc_vv_v1bf16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 1, e16alt, mf4, ta, ma
; CHECK-NEXT: vfmacc.vv v8, v10, v9
; CHECK-NEXT: ret
%vd = call <1 x bfloat> @llvm.fma.v1bf16(<1 x bfloat> %vb, <1 x bfloat> %vc, <1 x bfloat> %va)
ret <1 x bfloat> %vd
}
define <1 x bfloat> @vfmacc_vf_v1bf16(<1 x bfloat> %va, <1 x bfloat> %vb, bfloat %c) {
; CHECK-LABEL: vfmacc_vf_v1bf16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 1, e16alt, mf4, ta, ma
; CHECK-NEXT: vfmacc.vf v8, fa0, v9
; CHECK-NEXT: ret
%head = insertelement <1 x bfloat> poison, bfloat %c, i32 0
%splat = shufflevector <1 x bfloat> %head, <1 x bfloat> poison, <1 x i32> zeroinitializer
%vd = call <1 x bfloat> @llvm.fma.v1bf16(<1 x bfloat> %vb, <1 x bfloat> %splat, <1 x bfloat> %va)
ret <1 x bfloat> %vd
}
define <2 x bfloat> @vfmacc_vv_v2bf16(<2 x bfloat> %va, <2 x bfloat> %vb, <2 x bfloat> %vc) {
; CHECK-LABEL: vfmacc_vv_v2bf16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 2, e16alt, mf4, ta, ma
; CHECK-NEXT: vfmacc.vv v8, v10, v9
; CHECK-NEXT: ret
%vd = call <2 x bfloat> @llvm.fma.v2bf16(<2 x bfloat> %vb, <2 x bfloat> %vc, <2 x bfloat> %va)
ret <2 x bfloat> %vd
}
define <2 x bfloat> @vfmacc_vf_v2bf16(<2 x bfloat> %va, <2 x bfloat> %vb, bfloat %c) {
; CHECK-LABEL: vfmacc_vf_v2bf16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 2, e16alt, mf4, ta, ma
; CHECK-NEXT: vfmacc.vf v8, fa0, v9
; CHECK-NEXT: ret
%head = insertelement <2 x bfloat> poison, bfloat %c, i32 0
%splat = shufflevector <2 x bfloat> %head, <2 x bfloat> poison, <2 x i32> zeroinitializer
%vd = call <2 x bfloat> @llvm.fma.v2bf16(<2 x bfloat> %vb, <2 x bfloat> %splat, <2 x bfloat> %va)
ret <2 x bfloat> %vd
}
define <4 x bfloat> @vfmacc_vv_v4bf16(<4 x bfloat> %va, <4 x bfloat> %vb, <4 x bfloat> %vc) {
; CHECK-LABEL: vfmacc_vv_v4bf16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 4, e16alt, mf2, ta, ma
; CHECK-NEXT: vfmacc.vv v8, v10, v9
; CHECK-NEXT: ret
%vd = call <4 x bfloat> @llvm.fma.v4bf16(<4 x bfloat> %vb, <4 x bfloat> %vc, <4 x bfloat> %va)
ret <4 x bfloat> %vd
}
define <4 x bfloat> @vfmacc_vf_v4bf16(<4 x bfloat> %va, <4 x bfloat> %vb, bfloat %c) {
; CHECK-LABEL: vfmacc_vf_v4bf16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 4, e16alt, mf2, ta, ma
; CHECK-NEXT: vfmacc.vf v8, fa0, v9
; CHECK-NEXT: ret
%head = insertelement <4 x bfloat> poison, bfloat %c, i32 0
%splat = shufflevector <4 x bfloat> %head, <4 x bfloat> poison, <4 x i32> zeroinitializer
%vd = call <4 x bfloat> @llvm.fma.v4bf16(<4 x bfloat> %vb, <4 x bfloat> %splat, <4 x bfloat> %va)
ret <4 x bfloat> %vd
}
define <8 x bfloat> @vfmacc_vv_v8bf16(<8 x bfloat> %va, <8 x bfloat> %vb, <8 x bfloat> %vc) {
; CHECK-LABEL: vfmacc_vv_v8bf16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 8, e16alt, m1, ta, ma
; CHECK-NEXT: vfmacc.vv v8, v10, v9
; CHECK-NEXT: ret
%vd = call <8 x bfloat> @llvm.fma.v8bf16(<8 x bfloat> %vb, <8 x bfloat> %vc, <8 x bfloat> %va)
ret <8 x bfloat> %vd
}
define <8 x bfloat> @vfmacc_vf_v8bf16(<8 x bfloat> %va, <8 x bfloat> %vb, bfloat %c) {
; CHECK-LABEL: vfmacc_vf_v8bf16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 8, e16alt, m1, ta, ma
; CHECK-NEXT: vfmacc.vf v8, fa0, v9
; CHECK-NEXT: ret
%head = insertelement <8 x bfloat> poison, bfloat %c, i32 0
%splat = shufflevector <8 x bfloat> %head, <8 x bfloat> poison, <8 x i32> zeroinitializer
%vd = call <8 x bfloat> @llvm.fma.v8bf16(<8 x bfloat> %vb, <8 x bfloat> %splat, <8 x bfloat> %va)
ret <8 x bfloat> %vd
}
define <16 x bfloat> @vfmacc_vv_v16bf16(<16 x bfloat> %va, <16 x bfloat> %vb, <16 x bfloat> %vc) {
; CHECK-LABEL: vfmacc_vv_v16bf16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 16, e16alt, m2, ta, ma
; CHECK-NEXT: vfmacc.vv v8, v12, v10
; CHECK-NEXT: ret
%vd = call <16 x bfloat> @llvm.fma.v16bf16(<16 x bfloat> %vb, <16 x bfloat> %vc, <16 x bfloat> %va)
ret <16 x bfloat> %vd
}
define <16 x bfloat> @vfmacc_vf_v16bf16(<16 x bfloat> %va, <16 x bfloat> %vb, bfloat %c) {
; CHECK-LABEL: vfmacc_vf_v16bf16:
; CHECK: # %bb.0:
; CHECK-NEXT: vsetivli zero, 16, e16alt, m2, ta, ma
; CHECK-NEXT: vfmacc.vf v8, fa0, v10
; CHECK-NEXT: ret
%head = insertelement <16 x bfloat> poison, bfloat %c, i32 0
%splat = shufflevector <16 x bfloat> %head, <16 x bfloat> poison, <16 x i32> zeroinitializer
%vd = call <16 x bfloat> @llvm.fma.v16bf16(<16 x bfloat> %vb, <16 x bfloat> %splat, <16 x bfloat> %va)
ret <16 x bfloat> %vd
}
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