derek.holloway
7502bf64a4
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859 lines
29 KiB
LLVM
859 lines
29 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -mattr=+v,+zvfh,+zvfbfmin,+f,+d -target-abi=ilp32d \
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; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFH
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; RUN: llc -mtriple=riscv64 -mattr=+v,+zvfh,+zvfbfmin,+f,+d -target-abi=lp64d \
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; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFH
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; RUN: llc -mtriple=riscv32 -mattr=+v,+zvfh,+experimental-zvfbfa,+f,+d \
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; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFBFA
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; RUN: llc -mtriple=riscv64 -mattr=+v,+zvfh,+experimental-zvfbfa,+f,+d \
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; RUN: -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ZVFBFA
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define <2 x float> @vfwmul_v2f16(ptr %x, ptr %y) {
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; CHECK-LABEL: vfwmul_v2f16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
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; CHECK-NEXT: vle16.v v9, (a0)
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; CHECK-NEXT: vle16.v v10, (a1)
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; CHECK-NEXT: vfwmul.vv v8, v9, v10
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; CHECK-NEXT: ret
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%a = load <2 x half>, ptr %x
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%b = load <2 x half>, ptr %y
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%c = fpext <2 x half> %a to <2 x float>
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%d = fpext <2 x half> %b to <2 x float>
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%e = fmul <2 x float> %c, %d
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ret <2 x float> %e
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}
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define <4 x float> @vfwmul_v4f16(ptr %x, ptr %y) {
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; CHECK-LABEL: vfwmul_v4f16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
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; CHECK-NEXT: vle16.v v9, (a0)
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; CHECK-NEXT: vle16.v v10, (a1)
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; CHECK-NEXT: vfwmul.vv v8, v9, v10
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; CHECK-NEXT: ret
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%a = load <4 x half>, ptr %x
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%b = load <4 x half>, ptr %y
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%c = fpext <4 x half> %a to <4 x float>
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%d = fpext <4 x half> %b to <4 x float>
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%e = fmul <4 x float> %c, %d
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ret <4 x float> %e
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}
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define <8 x float> @vfwmul_v8f16(ptr %x, ptr %y) {
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; CHECK-LABEL: vfwmul_v8f16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma
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; CHECK-NEXT: vle16.v v10, (a0)
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; CHECK-NEXT: vle16.v v11, (a1)
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; CHECK-NEXT: vfwmul.vv v8, v10, v11
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; CHECK-NEXT: ret
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%a = load <8 x half>, ptr %x
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%b = load <8 x half>, ptr %y
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%c = fpext <8 x half> %a to <8 x float>
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%d = fpext <8 x half> %b to <8 x float>
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%e = fmul <8 x float> %c, %d
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ret <8 x float> %e
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}
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define <16 x float> @vfwmul_v16f16(ptr %x, ptr %y) {
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; CHECK-LABEL: vfwmul_v16f16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma
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; CHECK-NEXT: vle16.v v12, (a0)
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; CHECK-NEXT: vle16.v v14, (a1)
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; CHECK-NEXT: vfwmul.vv v8, v12, v14
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; CHECK-NEXT: ret
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%a = load <16 x half>, ptr %x
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%b = load <16 x half>, ptr %y
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%c = fpext <16 x half> %a to <16 x float>
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%d = fpext <16 x half> %b to <16 x float>
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%e = fmul <16 x float> %c, %d
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ret <16 x float> %e
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}
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define <32 x float> @vfwmul_v32f16(ptr %x, ptr %y) {
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; CHECK-LABEL: vfwmul_v32f16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: li a2, 32
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; CHECK-NEXT: vsetvli zero, a2, e16, m4, ta, ma
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; CHECK-NEXT: vle16.v v16, (a0)
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; CHECK-NEXT: vle16.v v20, (a1)
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; CHECK-NEXT: vfwmul.vv v8, v16, v20
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; CHECK-NEXT: ret
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%a = load <32 x half>, ptr %x
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%b = load <32 x half>, ptr %y
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%c = fpext <32 x half> %a to <32 x float>
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%d = fpext <32 x half> %b to <32 x float>
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%e = fmul <32 x float> %c, %d
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ret <32 x float> %e
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}
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define <64 x float> @vfwmul_v64f16(ptr %x, ptr %y) {
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; CHECK-LABEL: vfwmul_v64f16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi sp, sp, -16
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: csrr a2, vlenb
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; CHECK-NEXT: slli a2, a2, 3
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; CHECK-NEXT: sub sp, sp, a2
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; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb
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; CHECK-NEXT: li a2, 64
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; CHECK-NEXT: vsetvli zero, a2, e16, m8, ta, ma
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; CHECK-NEXT: vle16.v v16, (a0)
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; CHECK-NEXT: vle16.v v24, (a1)
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; CHECK-NEXT: li a0, 32
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; CHECK-NEXT: vsetvli zero, a0, e16, m8, ta, ma
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; CHECK-NEXT: vslidedown.vx v8, v16, a0
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; CHECK-NEXT: addi a1, sp, 16
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; CHECK-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill
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; CHECK-NEXT: vslidedown.vx v0, v24, a0
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; CHECK-NEXT: vsetvli zero, a0, e16, m4, ta, ma
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; CHECK-NEXT: vfwmul.vv v8, v16, v24
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; CHECK-NEXT: addi a0, sp, 16
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; CHECK-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload
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; CHECK-NEXT: vfwmul.vv v16, v24, v0
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; CHECK-NEXT: csrr a0, vlenb
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; CHECK-NEXT: slli a0, a0, 3
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; CHECK-NEXT: add sp, sp, a0
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; CHECK-NEXT: .cfi_def_cfa sp, 16
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; CHECK-NEXT: addi sp, sp, 16
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; CHECK-NEXT: .cfi_def_cfa_offset 0
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; CHECK-NEXT: ret
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%a = load <64 x half>, ptr %x
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%b = load <64 x half>, ptr %y
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%c = fpext <64 x half> %a to <64 x float>
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%d = fpext <64 x half> %b to <64 x float>
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%e = fmul <64 x float> %c, %d
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ret <64 x float> %e
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}
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define <2 x double> @vfwmul_v2f32(ptr %x, ptr %y) {
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; CHECK-LABEL: vfwmul_v2f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
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; CHECK-NEXT: vle32.v v9, (a0)
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; CHECK-NEXT: vle32.v v10, (a1)
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; CHECK-NEXT: vfwmul.vv v8, v9, v10
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; CHECK-NEXT: ret
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%a = load <2 x float>, ptr %x
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%b = load <2 x float>, ptr %y
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%c = fpext <2 x float> %a to <2 x double>
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%d = fpext <2 x float> %b to <2 x double>
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%e = fmul <2 x double> %c, %d
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ret <2 x double> %e
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}
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define <4 x double> @vfwmul_v4f32(ptr %x, ptr %y) {
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; CHECK-LABEL: vfwmul_v4f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
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; CHECK-NEXT: vle32.v v10, (a0)
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; CHECK-NEXT: vle32.v v11, (a1)
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; CHECK-NEXT: vfwmul.vv v8, v10, v11
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; CHECK-NEXT: ret
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%a = load <4 x float>, ptr %x
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%b = load <4 x float>, ptr %y
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%c = fpext <4 x float> %a to <4 x double>
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%d = fpext <4 x float> %b to <4 x double>
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%e = fmul <4 x double> %c, %d
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ret <4 x double> %e
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}
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define <8 x double> @vfwmul_v8f32(ptr %x, ptr %y) {
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; CHECK-LABEL: vfwmul_v8f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma
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; CHECK-NEXT: vle32.v v12, (a0)
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; CHECK-NEXT: vle32.v v14, (a1)
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; CHECK-NEXT: vfwmul.vv v8, v12, v14
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; CHECK-NEXT: ret
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%a = load <8 x float>, ptr %x
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%b = load <8 x float>, ptr %y
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%c = fpext <8 x float> %a to <8 x double>
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%d = fpext <8 x float> %b to <8 x double>
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%e = fmul <8 x double> %c, %d
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ret <8 x double> %e
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}
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define <16 x double> @vfwmul_v16f32(ptr %x, ptr %y) {
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; CHECK-LABEL: vfwmul_v16f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma
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; CHECK-NEXT: vle32.v v16, (a0)
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; CHECK-NEXT: vle32.v v20, (a1)
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; CHECK-NEXT: vfwmul.vv v8, v16, v20
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; CHECK-NEXT: ret
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%a = load <16 x float>, ptr %x
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%b = load <16 x float>, ptr %y
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%c = fpext <16 x float> %a to <16 x double>
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%d = fpext <16 x float> %b to <16 x double>
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%e = fmul <16 x double> %c, %d
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ret <16 x double> %e
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}
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define <32 x double> @vfwmul_v32f32(ptr %x, ptr %y) {
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; CHECK-LABEL: vfwmul_v32f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi sp, sp, -16
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: csrr a2, vlenb
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; CHECK-NEXT: slli a2, a2, 3
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; CHECK-NEXT: sub sp, sp, a2
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; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb
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; CHECK-NEXT: li a2, 32
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; CHECK-NEXT: vsetvli zero, a2, e32, m8, ta, ma
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; CHECK-NEXT: vle32.v v16, (a0)
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; CHECK-NEXT: vle32.v v24, (a1)
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; CHECK-NEXT: vsetivli zero, 16, e32, m8, ta, ma
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; CHECK-NEXT: vslidedown.vi v8, v16, 16
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; CHECK-NEXT: addi a0, sp, 16
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; CHECK-NEXT: vs8r.v v8, (a0) # vscale x 64-byte Folded Spill
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; CHECK-NEXT: vslidedown.vi v0, v24, 16
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; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma
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; CHECK-NEXT: vfwmul.vv v8, v16, v24
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; CHECK-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload
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; CHECK-NEXT: vfwmul.vv v16, v24, v0
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; CHECK-NEXT: csrr a0, vlenb
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; CHECK-NEXT: slli a0, a0, 3
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; CHECK-NEXT: add sp, sp, a0
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; CHECK-NEXT: .cfi_def_cfa sp, 16
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; CHECK-NEXT: addi sp, sp, 16
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; CHECK-NEXT: .cfi_def_cfa_offset 0
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; CHECK-NEXT: ret
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%a = load <32 x float>, ptr %x
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%b = load <32 x float>, ptr %y
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%c = fpext <32 x float> %a to <32 x double>
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%d = fpext <32 x float> %b to <32 x double>
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%e = fmul <32 x double> %c, %d
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ret <32 x double> %e
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}
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define <2 x float> @vfwmul_vf_v2f16(ptr %x, half %y) {
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; CHECK-LABEL: vfwmul_vf_v2f16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
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; CHECK-NEXT: vle16.v v9, (a0)
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; CHECK-NEXT: vfwmul.vf v8, v9, fa0
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; CHECK-NEXT: ret
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%a = load <2 x half>, ptr %x
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%b = insertelement <2 x half> poison, half %y, i32 0
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%c = shufflevector <2 x half> %b, <2 x half> poison, <2 x i32> zeroinitializer
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%d = fpext <2 x half> %a to <2 x float>
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%e = fpext <2 x half> %c to <2 x float>
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%f = fmul <2 x float> %d, %e
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ret <2 x float> %f
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}
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define <4 x float> @vfwmul_vf_v4f16(ptr %x, half %y) {
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; CHECK-LABEL: vfwmul_vf_v4f16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
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; CHECK-NEXT: vle16.v v9, (a0)
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; CHECK-NEXT: vfwmul.vf v8, v9, fa0
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; CHECK-NEXT: ret
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%a = load <4 x half>, ptr %x
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%b = insertelement <4 x half> poison, half %y, i32 0
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%c = shufflevector <4 x half> %b, <4 x half> poison, <4 x i32> zeroinitializer
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%d = fpext <4 x half> %a to <4 x float>
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%e = fpext <4 x half> %c to <4 x float>
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%f = fmul <4 x float> %d, %e
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ret <4 x float> %f
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}
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define <8 x float> @vfwmul_vf_v8f16(ptr %x, half %y) {
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; CHECK-LABEL: vfwmul_vf_v8f16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma
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; CHECK-NEXT: vle16.v v10, (a0)
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; CHECK-NEXT: vfwmul.vf v8, v10, fa0
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; CHECK-NEXT: ret
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%a = load <8 x half>, ptr %x
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%b = insertelement <8 x half> poison, half %y, i32 0
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%c = shufflevector <8 x half> %b, <8 x half> poison, <8 x i32> zeroinitializer
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%d = fpext <8 x half> %a to <8 x float>
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%e = fpext <8 x half> %c to <8 x float>
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%f = fmul <8 x float> %d, %e
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ret <8 x float> %f
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}
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define <16 x float> @vfwmul_vf_v16f16(ptr %x, half %y) {
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; CHECK-LABEL: vfwmul_vf_v16f16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma
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; CHECK-NEXT: vle16.v v12, (a0)
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; CHECK-NEXT: vfwmul.vf v8, v12, fa0
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; CHECK-NEXT: ret
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%a = load <16 x half>, ptr %x
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%b = insertelement <16 x half> poison, half %y, i32 0
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%c = shufflevector <16 x half> %b, <16 x half> poison, <16 x i32> zeroinitializer
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%d = fpext <16 x half> %a to <16 x float>
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%e = fpext <16 x half> %c to <16 x float>
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%f = fmul <16 x float> %d, %e
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ret <16 x float> %f
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}
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define <32 x float> @vfwmul_vf_v32f16(ptr %x, half %y) {
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; CHECK-LABEL: vfwmul_vf_v32f16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: li a1, 32
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; CHECK-NEXT: vsetvli zero, a1, e16, m4, ta, ma
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; CHECK-NEXT: vle16.v v16, (a0)
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; CHECK-NEXT: vfwmul.vf v8, v16, fa0
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; CHECK-NEXT: ret
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%a = load <32 x half>, ptr %x
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%b = insertelement <32 x half> poison, half %y, i32 0
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%c = shufflevector <32 x half> %b, <32 x half> poison, <32 x i32> zeroinitializer
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%d = fpext <32 x half> %a to <32 x float>
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%e = fpext <32 x half> %c to <32 x float>
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%f = fmul <32 x float> %d, %e
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ret <32 x float> %f
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}
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define <2 x double> @vfwmul_vf_v2f32(ptr %x, float %y) {
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; CHECK-LABEL: vfwmul_vf_v2f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
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; CHECK-NEXT: vle32.v v9, (a0)
|
|
; CHECK-NEXT: vfwmul.vf v8, v9, fa0
|
|
; CHECK-NEXT: ret
|
|
%a = load <2 x float>, ptr %x
|
|
%b = insertelement <2 x float> poison, float %y, i32 0
|
|
%c = shufflevector <2 x float> %b, <2 x float> poison, <2 x i32> zeroinitializer
|
|
%d = fpext <2 x float> %a to <2 x double>
|
|
%e = fpext <2 x float> %c to <2 x double>
|
|
%f = fmul <2 x double> %d, %e
|
|
ret <2 x double> %f
|
|
}
|
|
|
|
define <4 x double> @vfwmul_vf_v4f32(ptr %x, float %y) {
|
|
; CHECK-LABEL: vfwmul_vf_v4f32:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
|
|
; CHECK-NEXT: vle32.v v10, (a0)
|
|
; CHECK-NEXT: vfwmul.vf v8, v10, fa0
|
|
; CHECK-NEXT: ret
|
|
%a = load <4 x float>, ptr %x
|
|
%b = insertelement <4 x float> poison, float %y, i32 0
|
|
%c = shufflevector <4 x float> %b, <4 x float> poison, <4 x i32> zeroinitializer
|
|
%d = fpext <4 x float> %a to <4 x double>
|
|
%e = fpext <4 x float> %c to <4 x double>
|
|
%f = fmul <4 x double> %d, %e
|
|
ret <4 x double> %f
|
|
}
|
|
|
|
define <8 x double> @vfwmul_vf_v8f32(ptr %x, float %y) {
|
|
; CHECK-LABEL: vfwmul_vf_v8f32:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma
|
|
; CHECK-NEXT: vle32.v v12, (a0)
|
|
; CHECK-NEXT: vfwmul.vf v8, v12, fa0
|
|
; CHECK-NEXT: ret
|
|
%a = load <8 x float>, ptr %x
|
|
%b = insertelement <8 x float> poison, float %y, i32 0
|
|
%c = shufflevector <8 x float> %b, <8 x float> poison, <8 x i32> zeroinitializer
|
|
%d = fpext <8 x float> %a to <8 x double>
|
|
%e = fpext <8 x float> %c to <8 x double>
|
|
%f = fmul <8 x double> %d, %e
|
|
ret <8 x double> %f
|
|
}
|
|
|
|
define <16 x double> @vfwmul_vf_v16f32(ptr %x, float %y) {
|
|
; CHECK-LABEL: vfwmul_vf_v16f32:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma
|
|
; CHECK-NEXT: vle32.v v16, (a0)
|
|
; CHECK-NEXT: vfwmul.vf v8, v16, fa0
|
|
; CHECK-NEXT: ret
|
|
%a = load <16 x float>, ptr %x
|
|
%b = insertelement <16 x float> poison, float %y, i32 0
|
|
%c = shufflevector <16 x float> %b, <16 x float> poison, <16 x i32> zeroinitializer
|
|
%d = fpext <16 x float> %a to <16 x double>
|
|
%e = fpext <16 x float> %c to <16 x double>
|
|
%f = fmul <16 x double> %d, %e
|
|
ret <16 x double> %f
|
|
}
|
|
|
|
define <32 x double> @vfwmul_vf_v32f32(ptr %x, float %y) {
|
|
; CHECK-LABEL: vfwmul_vf_v32f32:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: li a1, 32
|
|
; CHECK-NEXT: vsetvli zero, a1, e32, m8, ta, ma
|
|
; CHECK-NEXT: vle32.v v16, (a0)
|
|
; CHECK-NEXT: vsetivli zero, 16, e32, m8, ta, ma
|
|
; CHECK-NEXT: vslidedown.vi v24, v16, 16
|
|
; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma
|
|
; CHECK-NEXT: vfwmul.vf v8, v16, fa0
|
|
; CHECK-NEXT: vfwmul.vf v16, v24, fa0
|
|
; CHECK-NEXT: ret
|
|
%a = load <32 x float>, ptr %x
|
|
%b = insertelement <32 x float> poison, float %y, i32 0
|
|
%c = shufflevector <32 x float> %b, <32 x float> poison, <32 x i32> zeroinitializer
|
|
%d = fpext <32 x float> %a to <32 x double>
|
|
%e = fpext <32 x float> %c to <32 x double>
|
|
%f = fmul <32 x double> %d, %e
|
|
ret <32 x double> %f
|
|
}
|
|
|
|
define <2 x float> @vfwmul_squared_v2f16_v2f32(ptr %x) {
|
|
; CHECK-LABEL: vfwmul_squared_v2f16_v2f32:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
|
|
; CHECK-NEXT: vle16.v v9, (a0)
|
|
; CHECK-NEXT: vfwmul.vv v8, v9, v9
|
|
; CHECK-NEXT: ret
|
|
%a = load <2 x half>, ptr %x
|
|
%b = fpext <2 x half> %a to <2 x float>
|
|
%c = fmul <2 x float> %b, %b
|
|
ret <2 x float> %c
|
|
}
|
|
|
|
define <2 x double> @vfwmul_squared_v2f32_v2f64(ptr %x) {
|
|
; CHECK-LABEL: vfwmul_squared_v2f32_v2f64:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
|
|
; CHECK-NEXT: vle32.v v9, (a0)
|
|
; CHECK-NEXT: vfwmul.vv v8, v9, v9
|
|
; CHECK-NEXT: ret
|
|
%a = load <2 x float>, ptr %x
|
|
%b = fpext <2 x float> %a to <2 x double>
|
|
%c = fmul <2 x double> %b, %b
|
|
ret <2 x double> %c
|
|
}
|
|
|
|
define <2 x double> @vfwmul_squared_v2f16_v2f64(ptr %x) {
|
|
; CHECK-LABEL: vfwmul_squared_v2f16_v2f64:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
|
|
; CHECK-NEXT: vle16.v v8, (a0)
|
|
; CHECK-NEXT: vfwcvt.f.f.v v9, v8
|
|
; CHECK-NEXT: vsetvli zero, zero, e32, mf2, ta, ma
|
|
; CHECK-NEXT: vfwmul.vv v8, v9, v9
|
|
; CHECK-NEXT: ret
|
|
%a = load <2 x half>, ptr %x
|
|
%b = fpext <2 x half> %a to <2 x double>
|
|
%c = fmul <2 x double> %b, %b
|
|
ret <2 x double> %c
|
|
}
|
|
|
|
define <2 x float> @vfwmul_vf2_v2f32(<2 x half> %x, half %y) {
|
|
; CHECK-LABEL: vfwmul_vf2_v2f32:
|
|
; CHECK: # %bb.0:
|
|
; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
|
|
; CHECK-NEXT: vfwmul.vf v9, v8, fa0
|
|
; CHECK-NEXT: vmv1r.v v8, v9
|
|
; CHECK-NEXT: ret
|
|
%a = fpext <2 x half> %x to <2 x float>
|
|
%b = fpext half %y to float
|
|
%c = insertelement <2 x float> poison, float %b, i32 0
|
|
%d = shufflevector <2 x float> %c, <2 x float> poison, <2 x i32> zeroinitializer
|
|
%e = fmul <2 x float> %a, %d
|
|
ret <2 x float> %e
|
|
}
|
|
|
|
define <2 x float> @vfwmul_v2bf16(ptr %x, ptr %y) {
|
|
; ZVFH-LABEL: vfwmul_v2bf16:
|
|
; ZVFH: # %bb.0:
|
|
; ZVFH-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
|
|
; ZVFH-NEXT: vle16.v v8, (a0)
|
|
; ZVFH-NEXT: vle16.v v9, (a1)
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v10, v8
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v8, v9
|
|
; ZVFH-NEXT: vsetvli zero, zero, e32, mf2, ta, ma
|
|
; ZVFH-NEXT: vfmul.vv v8, v10, v8
|
|
; ZVFH-NEXT: ret
|
|
;
|
|
; ZVFBFA-LABEL: vfwmul_v2bf16:
|
|
; ZVFBFA: # %bb.0:
|
|
; ZVFBFA-NEXT: vsetivli zero, 2, e16alt, mf4, ta, ma
|
|
; ZVFBFA-NEXT: vle16.v v9, (a0)
|
|
; ZVFBFA-NEXT: vle16.v v10, (a1)
|
|
; ZVFBFA-NEXT: vfwmul.vv v8, v9, v10
|
|
; ZVFBFA-NEXT: ret
|
|
%a = load <2 x bfloat>, ptr %x
|
|
%b = load <2 x bfloat>, ptr %y
|
|
%c = fpext <2 x bfloat> %a to <2 x float>
|
|
%d = fpext <2 x bfloat> %b to <2 x float>
|
|
%e = fmul <2 x float> %c, %d
|
|
ret <2 x float> %e
|
|
}
|
|
|
|
define <4 x float> @vfwmul_v4bf16(ptr %x, ptr %y) {
|
|
; ZVFH-LABEL: vfwmul_v4bf16:
|
|
; ZVFH: # %bb.0:
|
|
; ZVFH-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
|
|
; ZVFH-NEXT: vle16.v v8, (a0)
|
|
; ZVFH-NEXT: vle16.v v9, (a1)
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v10, v8
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v8, v9
|
|
; ZVFH-NEXT: vsetvli zero, zero, e32, m1, ta, ma
|
|
; ZVFH-NEXT: vfmul.vv v8, v10, v8
|
|
; ZVFH-NEXT: ret
|
|
;
|
|
; ZVFBFA-LABEL: vfwmul_v4bf16:
|
|
; ZVFBFA: # %bb.0:
|
|
; ZVFBFA-NEXT: vsetivli zero, 4, e16alt, mf2, ta, ma
|
|
; ZVFBFA-NEXT: vle16.v v9, (a0)
|
|
; ZVFBFA-NEXT: vle16.v v10, (a1)
|
|
; ZVFBFA-NEXT: vfwmul.vv v8, v9, v10
|
|
; ZVFBFA-NEXT: ret
|
|
%a = load <4 x bfloat>, ptr %x
|
|
%b = load <4 x bfloat>, ptr %y
|
|
%c = fpext <4 x bfloat> %a to <4 x float>
|
|
%d = fpext <4 x bfloat> %b to <4 x float>
|
|
%e = fmul <4 x float> %c, %d
|
|
ret <4 x float> %e
|
|
}
|
|
|
|
define <8 x float> @vfwmul_v8bf16(ptr %x, ptr %y) {
|
|
; ZVFH-LABEL: vfwmul_v8bf16:
|
|
; ZVFH: # %bb.0:
|
|
; ZVFH-NEXT: vsetivli zero, 8, e16, m1, ta, ma
|
|
; ZVFH-NEXT: vle16.v v10, (a0)
|
|
; ZVFH-NEXT: vle16.v v12, (a1)
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v8, v10
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v10, v12
|
|
; ZVFH-NEXT: vsetvli zero, zero, e32, m2, ta, ma
|
|
; ZVFH-NEXT: vfmul.vv v8, v8, v10
|
|
; ZVFH-NEXT: ret
|
|
;
|
|
; ZVFBFA-LABEL: vfwmul_v8bf16:
|
|
; ZVFBFA: # %bb.0:
|
|
; ZVFBFA-NEXT: vsetivli zero, 8, e16alt, m1, ta, ma
|
|
; ZVFBFA-NEXT: vle16.v v10, (a0)
|
|
; ZVFBFA-NEXT: vle16.v v11, (a1)
|
|
; ZVFBFA-NEXT: vfwmul.vv v8, v10, v11
|
|
; ZVFBFA-NEXT: ret
|
|
%a = load <8 x bfloat>, ptr %x
|
|
%b = load <8 x bfloat>, ptr %y
|
|
%c = fpext <8 x bfloat> %a to <8 x float>
|
|
%d = fpext <8 x bfloat> %b to <8 x float>
|
|
%e = fmul <8 x float> %c, %d
|
|
ret <8 x float> %e
|
|
}
|
|
|
|
define <16 x float> @vfwmul_v16bf16(ptr %x, ptr %y) {
|
|
; ZVFH-LABEL: vfwmul_v16bf16:
|
|
; ZVFH: # %bb.0:
|
|
; ZVFH-NEXT: vsetivli zero, 16, e16, m2, ta, ma
|
|
; ZVFH-NEXT: vle16.v v12, (a0)
|
|
; ZVFH-NEXT: vle16.v v16, (a1)
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v8, v12
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v12, v16
|
|
; ZVFH-NEXT: vsetvli zero, zero, e32, m4, ta, ma
|
|
; ZVFH-NEXT: vfmul.vv v8, v8, v12
|
|
; ZVFH-NEXT: ret
|
|
;
|
|
; ZVFBFA-LABEL: vfwmul_v16bf16:
|
|
; ZVFBFA: # %bb.0:
|
|
; ZVFBFA-NEXT: vsetivli zero, 16, e16alt, m2, ta, ma
|
|
; ZVFBFA-NEXT: vle16.v v12, (a0)
|
|
; ZVFBFA-NEXT: vle16.v v14, (a1)
|
|
; ZVFBFA-NEXT: vfwmul.vv v8, v12, v14
|
|
; ZVFBFA-NEXT: ret
|
|
%a = load <16 x bfloat>, ptr %x
|
|
%b = load <16 x bfloat>, ptr %y
|
|
%c = fpext <16 x bfloat> %a to <16 x float>
|
|
%d = fpext <16 x bfloat> %b to <16 x float>
|
|
%e = fmul <16 x float> %c, %d
|
|
ret <16 x float> %e
|
|
}
|
|
|
|
define <32 x float> @vfwmul_v32bf16(ptr %x, ptr %y) {
|
|
; ZVFH-LABEL: vfwmul_v32bf16:
|
|
; ZVFH: # %bb.0:
|
|
; ZVFH-NEXT: li a2, 32
|
|
; ZVFH-NEXT: vsetvli zero, a2, e16, m4, ta, ma
|
|
; ZVFH-NEXT: vle16.v v16, (a0)
|
|
; ZVFH-NEXT: vle16.v v24, (a1)
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v8, v16
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v16, v24
|
|
; ZVFH-NEXT: vsetvli zero, zero, e32, m8, ta, ma
|
|
; ZVFH-NEXT: vfmul.vv v8, v8, v16
|
|
; ZVFH-NEXT: ret
|
|
;
|
|
; ZVFBFA-LABEL: vfwmul_v32bf16:
|
|
; ZVFBFA: # %bb.0:
|
|
; ZVFBFA-NEXT: li a2, 32
|
|
; ZVFBFA-NEXT: vsetvli zero, a2, e16alt, m4, ta, ma
|
|
; ZVFBFA-NEXT: vle16.v v16, (a0)
|
|
; ZVFBFA-NEXT: vle16.v v20, (a1)
|
|
; ZVFBFA-NEXT: vfwmul.vv v8, v16, v20
|
|
; ZVFBFA-NEXT: ret
|
|
%a = load <32 x bfloat>, ptr %x
|
|
%b = load <32 x bfloat>, ptr %y
|
|
%c = fpext <32 x bfloat> %a to <32 x float>
|
|
%d = fpext <32 x bfloat> %b to <32 x float>
|
|
%e = fmul <32 x float> %c, %d
|
|
ret <32 x float> %e
|
|
}
|
|
|
|
define <64 x float> @vfwmul_v64bf16(ptr %x, ptr %y) {
|
|
; ZVFH-LABEL: vfwmul_v64bf16:
|
|
; ZVFH: # %bb.0:
|
|
; ZVFH-NEXT: addi sp, sp, -16
|
|
; ZVFH-NEXT: .cfi_def_cfa_offset 16
|
|
; ZVFH-NEXT: csrr a2, vlenb
|
|
; ZVFH-NEXT: slli a2, a2, 3
|
|
; ZVFH-NEXT: sub sp, sp, a2
|
|
; ZVFH-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb
|
|
; ZVFH-NEXT: li a2, 64
|
|
; ZVFH-NEXT: vsetvli zero, a2, e16, m8, ta, ma
|
|
; ZVFH-NEXT: vle16.v v16, (a0)
|
|
; ZVFH-NEXT: vle16.v v8, (a1)
|
|
; ZVFH-NEXT: li a0, 32
|
|
; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma
|
|
; ZVFH-NEXT: vslidedown.vx v24, v16, a0
|
|
; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v0, v16
|
|
; ZVFH-NEXT: addi a1, sp, 16
|
|
; ZVFH-NEXT: vs8r.v v0, (a1) # vscale x 64-byte Folded Spill
|
|
; ZVFH-NEXT: vsetvli zero, a0, e16, m8, ta, ma
|
|
; ZVFH-NEXT: vslidedown.vx v16, v8, a0
|
|
; ZVFH-NEXT: vsetvli zero, a0, e16, m4, ta, ma
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v0, v8
|
|
; ZVFH-NEXT: vmv4r.v v8, v24
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v24, v8
|
|
; ZVFH-NEXT: vmv4r.v v8, v16
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v16, v8
|
|
; ZVFH-NEXT: addi a0, sp, 16
|
|
; ZVFH-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload
|
|
; ZVFH-NEXT: vsetvli zero, zero, e32, m8, ta, ma
|
|
; ZVFH-NEXT: vfmul.vv v8, v8, v0
|
|
; ZVFH-NEXT: vfmul.vv v16, v24, v16
|
|
; ZVFH-NEXT: csrr a0, vlenb
|
|
; ZVFH-NEXT: slli a0, a0, 3
|
|
; ZVFH-NEXT: add sp, sp, a0
|
|
; ZVFH-NEXT: .cfi_def_cfa sp, 16
|
|
; ZVFH-NEXT: addi sp, sp, 16
|
|
; ZVFH-NEXT: .cfi_def_cfa_offset 0
|
|
; ZVFH-NEXT: ret
|
|
;
|
|
; ZVFBFA-LABEL: vfwmul_v64bf16:
|
|
; ZVFBFA: # %bb.0:
|
|
; ZVFBFA-NEXT: addi sp, sp, -16
|
|
; ZVFBFA-NEXT: .cfi_def_cfa_offset 16
|
|
; ZVFBFA-NEXT: csrr a2, vlenb
|
|
; ZVFBFA-NEXT: slli a2, a2, 3
|
|
; ZVFBFA-NEXT: sub sp, sp, a2
|
|
; ZVFBFA-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb
|
|
; ZVFBFA-NEXT: li a2, 64
|
|
; ZVFBFA-NEXT: vsetvli zero, a2, e16, m8, ta, ma
|
|
; ZVFBFA-NEXT: vle16.v v16, (a0)
|
|
; ZVFBFA-NEXT: vle16.v v24, (a1)
|
|
; ZVFBFA-NEXT: li a0, 32
|
|
; ZVFBFA-NEXT: vsetvli zero, a0, e16, m8, ta, ma
|
|
; ZVFBFA-NEXT: vslidedown.vx v8, v16, a0
|
|
; ZVFBFA-NEXT: addi a1, sp, 16
|
|
; ZVFBFA-NEXT: vs8r.v v8, (a1) # vscale x 64-byte Folded Spill
|
|
; ZVFBFA-NEXT: vslidedown.vx v0, v24, a0
|
|
; ZVFBFA-NEXT: vsetvli zero, a0, e16alt, m4, ta, ma
|
|
; ZVFBFA-NEXT: vfwmul.vv v8, v16, v24
|
|
; ZVFBFA-NEXT: addi a0, sp, 16
|
|
; ZVFBFA-NEXT: vl8r.v v24, (a0) # vscale x 64-byte Folded Reload
|
|
; ZVFBFA-NEXT: vfwmul.vv v16, v24, v0
|
|
; ZVFBFA-NEXT: csrr a0, vlenb
|
|
; ZVFBFA-NEXT: slli a0, a0, 3
|
|
; ZVFBFA-NEXT: add sp, sp, a0
|
|
; ZVFBFA-NEXT: .cfi_def_cfa sp, 16
|
|
; ZVFBFA-NEXT: addi sp, sp, 16
|
|
; ZVFBFA-NEXT: .cfi_def_cfa_offset 0
|
|
; ZVFBFA-NEXT: ret
|
|
%a = load <64 x bfloat>, ptr %x
|
|
%b = load <64 x bfloat>, ptr %y
|
|
%c = fpext <64 x bfloat> %a to <64 x float>
|
|
%d = fpext <64 x bfloat> %b to <64 x float>
|
|
%e = fmul <64 x float> %c, %d
|
|
ret <64 x float> %e
|
|
}
|
|
|
|
define <2 x float> @vfwmul_vf_v2bf16(ptr %x, bfloat %y) {
|
|
; ZVFH-LABEL: vfwmul_vf_v2bf16:
|
|
; ZVFH: # %bb.0:
|
|
; ZVFH-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
|
|
; ZVFH-NEXT: vle16.v v8, (a0)
|
|
; ZVFH-NEXT: fmv.x.w a0, fa0
|
|
; ZVFH-NEXT: vmv.v.x v9, a0
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v10, v8
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v8, v9
|
|
; ZVFH-NEXT: vsetvli zero, zero, e32, mf2, ta, ma
|
|
; ZVFH-NEXT: vfmul.vv v8, v10, v8
|
|
; ZVFH-NEXT: ret
|
|
;
|
|
; ZVFBFA-LABEL: vfwmul_vf_v2bf16:
|
|
; ZVFBFA: # %bb.0:
|
|
; ZVFBFA-NEXT: vsetivli zero, 2, e16alt, mf4, ta, ma
|
|
; ZVFBFA-NEXT: vle16.v v9, (a0)
|
|
; ZVFBFA-NEXT: vfwmul.vf v8, v9, fa0
|
|
; ZVFBFA-NEXT: ret
|
|
%a = load <2 x bfloat>, ptr %x
|
|
%b = insertelement <2 x bfloat> poison, bfloat %y, i32 0
|
|
%c = shufflevector <2 x bfloat> %b, <2 x bfloat> poison, <2 x i32> zeroinitializer
|
|
%d = fpext <2 x bfloat> %a to <2 x float>
|
|
%e = fpext <2 x bfloat> %c to <2 x float>
|
|
%f = fmul <2 x float> %d, %e
|
|
ret <2 x float> %f
|
|
}
|
|
|
|
define <4 x float> @vfwmul_vf_v4bf16(ptr %x, bfloat %y) {
|
|
; ZVFH-LABEL: vfwmul_vf_v4bf16:
|
|
; ZVFH: # %bb.0:
|
|
; ZVFH-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
|
|
; ZVFH-NEXT: vle16.v v8, (a0)
|
|
; ZVFH-NEXT: fmv.x.w a0, fa0
|
|
; ZVFH-NEXT: vmv.v.x v9, a0
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v10, v8
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v8, v9
|
|
; ZVFH-NEXT: vsetvli zero, zero, e32, m1, ta, ma
|
|
; ZVFH-NEXT: vfmul.vv v8, v10, v8
|
|
; ZVFH-NEXT: ret
|
|
;
|
|
; ZVFBFA-LABEL: vfwmul_vf_v4bf16:
|
|
; ZVFBFA: # %bb.0:
|
|
; ZVFBFA-NEXT: vsetivli zero, 4, e16alt, mf2, ta, ma
|
|
; ZVFBFA-NEXT: vle16.v v9, (a0)
|
|
; ZVFBFA-NEXT: vfwmul.vf v8, v9, fa0
|
|
; ZVFBFA-NEXT: ret
|
|
%a = load <4 x bfloat>, ptr %x
|
|
%b = insertelement <4 x bfloat> poison, bfloat %y, i32 0
|
|
%c = shufflevector <4 x bfloat> %b, <4 x bfloat> poison, <4 x i32> zeroinitializer
|
|
%d = fpext <4 x bfloat> %a to <4 x float>
|
|
%e = fpext <4 x bfloat> %c to <4 x float>
|
|
%f = fmul <4 x float> %d, %e
|
|
ret <4 x float> %f
|
|
}
|
|
|
|
define <8 x float> @vfwmul_vf_v8bf16(ptr %x, bfloat %y) {
|
|
; ZVFH-LABEL: vfwmul_vf_v8bf16:
|
|
; ZVFH: # %bb.0:
|
|
; ZVFH-NEXT: vsetivli zero, 8, e16, m1, ta, ma
|
|
; ZVFH-NEXT: vle16.v v10, (a0)
|
|
; ZVFH-NEXT: fmv.x.w a0, fa0
|
|
; ZVFH-NEXT: vmv.v.x v12, a0
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v8, v10
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v10, v12
|
|
; ZVFH-NEXT: vsetvli zero, zero, e32, m2, ta, ma
|
|
; ZVFH-NEXT: vfmul.vv v8, v8, v10
|
|
; ZVFH-NEXT: ret
|
|
;
|
|
; ZVFBFA-LABEL: vfwmul_vf_v8bf16:
|
|
; ZVFBFA: # %bb.0:
|
|
; ZVFBFA-NEXT: vsetivli zero, 8, e16alt, m1, ta, ma
|
|
; ZVFBFA-NEXT: vle16.v v10, (a0)
|
|
; ZVFBFA-NEXT: vfwmul.vf v8, v10, fa0
|
|
; ZVFBFA-NEXT: ret
|
|
%a = load <8 x bfloat>, ptr %x
|
|
%b = insertelement <8 x bfloat> poison, bfloat %y, i32 0
|
|
%c = shufflevector <8 x bfloat> %b, <8 x bfloat> poison, <8 x i32> zeroinitializer
|
|
%d = fpext <8 x bfloat> %a to <8 x float>
|
|
%e = fpext <8 x bfloat> %c to <8 x float>
|
|
%f = fmul <8 x float> %d, %e
|
|
ret <8 x float> %f
|
|
}
|
|
|
|
define <16 x float> @vfwmul_vf_v16bf16(ptr %x, bfloat %y) {
|
|
; ZVFH-LABEL: vfwmul_vf_v16bf16:
|
|
; ZVFH: # %bb.0:
|
|
; ZVFH-NEXT: vsetivli zero, 16, e16, m2, ta, ma
|
|
; ZVFH-NEXT: vle16.v v12, (a0)
|
|
; ZVFH-NEXT: fmv.x.w a0, fa0
|
|
; ZVFH-NEXT: vmv.v.x v16, a0
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v8, v12
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v12, v16
|
|
; ZVFH-NEXT: vsetvli zero, zero, e32, m4, ta, ma
|
|
; ZVFH-NEXT: vfmul.vv v8, v8, v12
|
|
; ZVFH-NEXT: ret
|
|
;
|
|
; ZVFBFA-LABEL: vfwmul_vf_v16bf16:
|
|
; ZVFBFA: # %bb.0:
|
|
; ZVFBFA-NEXT: vsetivli zero, 16, e16alt, m2, ta, ma
|
|
; ZVFBFA-NEXT: vle16.v v12, (a0)
|
|
; ZVFBFA-NEXT: vfwmul.vf v8, v12, fa0
|
|
; ZVFBFA-NEXT: ret
|
|
%a = load <16 x bfloat>, ptr %x
|
|
%b = insertelement <16 x bfloat> poison, bfloat %y, i32 0
|
|
%c = shufflevector <16 x bfloat> %b, <16 x bfloat> poison, <16 x i32> zeroinitializer
|
|
%d = fpext <16 x bfloat> %a to <16 x float>
|
|
%e = fpext <16 x bfloat> %c to <16 x float>
|
|
%f = fmul <16 x float> %d, %e
|
|
ret <16 x float> %f
|
|
}
|
|
|
|
define <32 x float> @vfwmul_vf_v32bf16(ptr %x, bfloat %y) {
|
|
; ZVFH-LABEL: vfwmul_vf_v32bf16:
|
|
; ZVFH: # %bb.0:
|
|
; ZVFH-NEXT: li a1, 32
|
|
; ZVFH-NEXT: vsetvli zero, a1, e16, m4, ta, ma
|
|
; ZVFH-NEXT: vle16.v v16, (a0)
|
|
; ZVFH-NEXT: fmv.x.w a0, fa0
|
|
; ZVFH-NEXT: vmv.v.x v24, a0
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v8, v16
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v16, v24
|
|
; ZVFH-NEXT: vsetvli zero, zero, e32, m8, ta, ma
|
|
; ZVFH-NEXT: vfmul.vv v8, v8, v16
|
|
; ZVFH-NEXT: ret
|
|
;
|
|
; ZVFBFA-LABEL: vfwmul_vf_v32bf16:
|
|
; ZVFBFA: # %bb.0:
|
|
; ZVFBFA-NEXT: li a1, 32
|
|
; ZVFBFA-NEXT: vsetvli zero, a1, e16alt, m4, ta, ma
|
|
; ZVFBFA-NEXT: vle16.v v16, (a0)
|
|
; ZVFBFA-NEXT: vfwmul.vf v8, v16, fa0
|
|
; ZVFBFA-NEXT: ret
|
|
%a = load <32 x bfloat>, ptr %x
|
|
%b = insertelement <32 x bfloat> poison, bfloat %y, i32 0
|
|
%c = shufflevector <32 x bfloat> %b, <32 x bfloat> poison, <32 x i32> zeroinitializer
|
|
%d = fpext <32 x bfloat> %a to <32 x float>
|
|
%e = fpext <32 x bfloat> %c to <32 x float>
|
|
%f = fmul <32 x float> %d, %e
|
|
ret <32 x float> %f
|
|
}
|
|
|
|
define <2 x float> @vfwmul_squared_v2bf16_v2f32(ptr %x) {
|
|
; ZVFH-LABEL: vfwmul_squared_v2bf16_v2f32:
|
|
; ZVFH: # %bb.0:
|
|
; ZVFH-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
|
|
; ZVFH-NEXT: vle16.v v8, (a0)
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v9, v8
|
|
; ZVFH-NEXT: vsetvli zero, zero, e32, mf2, ta, ma
|
|
; ZVFH-NEXT: vfmul.vv v8, v9, v9
|
|
; ZVFH-NEXT: ret
|
|
;
|
|
; ZVFBFA-LABEL: vfwmul_squared_v2bf16_v2f32:
|
|
; ZVFBFA: # %bb.0:
|
|
; ZVFBFA-NEXT: vsetivli zero, 2, e16alt, mf4, ta, ma
|
|
; ZVFBFA-NEXT: vle16.v v9, (a0)
|
|
; ZVFBFA-NEXT: vfwmul.vv v8, v9, v9
|
|
; ZVFBFA-NEXT: ret
|
|
%a = load <2 x bfloat>, ptr %x
|
|
%b = fpext <2 x bfloat> %a to <2 x float>
|
|
%c = fmul <2 x float> %b, %b
|
|
ret <2 x float> %c
|
|
}
|
|
|
|
define <2 x float> @vfwmul_vf2_v2bf16(<2 x bfloat> %x, bfloat %y) {
|
|
; ZVFH-LABEL: vfwmul_vf2_v2bf16:
|
|
; ZVFH: # %bb.0:
|
|
; ZVFH-NEXT: fmv.x.w a0, fa0
|
|
; ZVFH-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
|
|
; ZVFH-NEXT: vfwcvtbf16.f.f.v v9, v8
|
|
; ZVFH-NEXT: slli a0, a0, 16
|
|
; ZVFH-NEXT: fmv.w.x fa5, a0
|
|
; ZVFH-NEXT: vsetvli zero, zero, e32, mf2, ta, ma
|
|
; ZVFH-NEXT: vfmul.vf v8, v9, fa5
|
|
; ZVFH-NEXT: ret
|
|
;
|
|
; ZVFBFA-LABEL: vfwmul_vf2_v2bf16:
|
|
; ZVFBFA: # %bb.0:
|
|
; ZVFBFA-NEXT: vsetivli zero, 2, e16alt, mf4, ta, ma
|
|
; ZVFBFA-NEXT: vfwmul.vf v9, v8, fa0
|
|
; ZVFBFA-NEXT: vmv1r.v v8, v9
|
|
; ZVFBFA-NEXT: ret
|
|
%a = fpext <2 x bfloat> %x to <2 x float>
|
|
%b = fpext bfloat %y to float
|
|
%c = insertelement <2 x float> poison, float %b, i32 0
|
|
%d = shufflevector <2 x float> %c, <2 x float> poison, <2 x i32> zeroinitializer
|
|
%e = fmul <2 x float> %a, %d
|
|
ret <2 x float> %e
|
|
}
|