derek.holloway
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101 lines
4.4 KiB
LLVM
101 lines
4.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs %s -o - --riscv-lower-ext-max-web-size=1 | FileCheck %s --check-prefixes=NO_FOLDING1
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; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs %s -o - --riscv-lower-ext-max-web-size=1 | FileCheck %s --check-prefixes=NO_FOLDING1
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; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs %s -o - --riscv-lower-ext-max-web-size=2 | FileCheck %s --check-prefixes=NO_FOLDING2
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; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs %s -o - --riscv-lower-ext-max-web-size=2 | FileCheck %s --check-prefixes=NO_FOLDING2
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; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs %s -o - --riscv-lower-ext-max-web-size=3 | FileCheck %s --check-prefixes=FOLDING
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; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs %s -o - --riscv-lower-ext-max-web-size=3 | FileCheck %s --check-prefixes=FOLDING
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; Check that the default value enables the web folding and
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; that it is bigger than 3.
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; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=FOLDING
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; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=FOLDING
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; Check that the add/sub/mul operations are all promoted into their
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; vw counterpart when the folding of the web size is increased to 3.
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; We need the web size to be at least 3 for the folding to happen, because
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; %c has 3 uses.
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define <2 x i16> @vwmul_v2i16_multiple_users(ptr %x, ptr %y, ptr %z) {
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; NO_FOLDING1-LABEL: vwmul_v2i16_multiple_users:
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; NO_FOLDING1: # %bb.0:
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; NO_FOLDING1-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
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; NO_FOLDING1-NEXT: vle8.v v8, (a0)
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; NO_FOLDING1-NEXT: vle8.v v9, (a1)
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; NO_FOLDING1-NEXT: vle8.v v10, (a2)
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; NO_FOLDING1-NEXT: vsext.vf2 v11, v8
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; NO_FOLDING1-NEXT: vsext.vf2 v8, v9
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; NO_FOLDING1-NEXT: vsext.vf2 v9, v10
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; NO_FOLDING1-NEXT: vmul.vv v8, v11, v8
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; NO_FOLDING1-NEXT: vadd.vv v10, v11, v9
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; NO_FOLDING1-NEXT: vsub.vv v9, v11, v9
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; NO_FOLDING1-NEXT: vor.vv v8, v8, v10
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; NO_FOLDING1-NEXT: vor.vv v8, v8, v9
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; NO_FOLDING1-NEXT: ret
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;
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; NO_FOLDING2-LABEL: vwmul_v2i16_multiple_users:
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; NO_FOLDING2: # %bb.0:
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; NO_FOLDING2-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
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; NO_FOLDING2-NEXT: vle8.v v8, (a0)
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; NO_FOLDING2-NEXT: vle8.v v9, (a1)
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; NO_FOLDING2-NEXT: vle8.v v10, (a2)
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; NO_FOLDING2-NEXT: vsext.vf2 v11, v8
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; NO_FOLDING2-NEXT: vsext.vf2 v8, v9
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; NO_FOLDING2-NEXT: vmul.vv v8, v11, v8
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; NO_FOLDING2-NEXT: vsetvli zero, zero, e8, mf8, ta, ma
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; NO_FOLDING2-NEXT: vwadd.wv v9, v11, v10
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; NO_FOLDING2-NEXT: vwsub.wv v11, v11, v10
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; NO_FOLDING2-NEXT: vsetvli zero, zero, e16, mf4, ta, ma
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; NO_FOLDING2-NEXT: vor.vv v8, v8, v9
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; NO_FOLDING2-NEXT: vor.vv v8, v8, v11
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; NO_FOLDING2-NEXT: ret
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;
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; FOLDING-LABEL: vwmul_v2i16_multiple_users:
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; FOLDING: # %bb.0:
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; FOLDING-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
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; FOLDING-NEXT: vle8.v v8, (a0)
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; FOLDING-NEXT: vle8.v v9, (a1)
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; FOLDING-NEXT: vle8.v v10, (a2)
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; FOLDING-NEXT: vwmul.vv v11, v8, v9
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; FOLDING-NEXT: vwadd.vv v9, v8, v10
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; FOLDING-NEXT: vwsub.vv v12, v8, v10
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; FOLDING-NEXT: vsetvli zero, zero, e16, mf4, ta, ma
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; FOLDING-NEXT: vor.vv v8, v11, v9
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; FOLDING-NEXT: vor.vv v8, v8, v12
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; FOLDING-NEXT: ret
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%a = load <2 x i8>, ptr %x
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%b = load <2 x i8>, ptr %y
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%b2 = load <2 x i8>, ptr %z
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%c = sext <2 x i8> %a to <2 x i16>
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%d = sext <2 x i8> %b to <2 x i16>
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%d2 = sext <2 x i8> %b2 to <2 x i16>
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%e = mul <2 x i16> %c, %d
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%f = add <2 x i16> %c, %d2
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%g = sub <2 x i16> %c, %d2
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%h = or <2 x i16> %e, %f
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%i = or <2 x i16> %h, %g
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ret <2 x i16> %i
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}
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; Make sure we have a vsext.vl and a vwaddu.vx.
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define <4 x i32> @pr159152(<4 x i8> %x) {
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; NO_FOLDING-LABEL: pr159152:
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; NO_FOLDING: # %bb.0:
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; NO_FOLDING-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
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; NO_FOLDING-NEXT: vsext.vf2 v9, v8
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; NO_FOLDING-NEXT: li a0, 9
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; NO_FOLDING-NEXT: vwaddu.vx v8, v9, a0
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; NO_FOLDING-NEXT: ret
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;
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; FOLDING-LABEL: pr159152:
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; FOLDING: # %bb.0:
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; FOLDING-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
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; FOLDING-NEXT: vsext.vf2 v9, v8
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; FOLDING-NEXT: li a0, 9
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; FOLDING-NEXT: vwaddu.vx v8, v9, a0
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; FOLDING-NEXT: ret
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%a = sext <4 x i8> %x to <4 x i16>
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%b = zext <4 x i16> %a to <4 x i32>
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%c = add <4 x i32> %b, <i32 9, i32 9, i32 9, i32 9>
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ret <4 x i32> %c
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}
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