derek.holloway
7502bf64a4
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262 lines
9.0 KiB
LLVM
262 lines
9.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s
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define <2 x i16> @vwmaccus_vx_v2i16(ptr %x, i8 %y, <2 x i16> %z) {
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; CHECK-LABEL: vwmaccus_vx_v2i16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 2, e8, mf8, ta, ma
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; CHECK-NEXT: vle8.v v9, (a0)
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; CHECK-NEXT: vwmaccus.vx v8, a1, v9
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; CHECK-NEXT: ret
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%a = load <2 x i8>, ptr %x
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%b = insertelement <2 x i8> poison, i8 %y, i32 0
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%c = shufflevector <2 x i8> %b, <2 x i8> poison, <2 x i32> zeroinitializer
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%d = sext <2 x i8> %a to <2 x i16>
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%e = zext <2 x i8> %c to <2 x i16>
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%f = mul <2 x i16> %d, %e
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%g = add <2 x i16> %f, %z
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ret <2 x i16> %g
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}
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define <4 x i16> @vwmaccus_vx_v4i16(ptr %x, i8 %y, <4 x i16> %z) {
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; CHECK-LABEL: vwmaccus_vx_v4i16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 4, e8, mf4, ta, ma
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; CHECK-NEXT: vle8.v v9, (a0)
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; CHECK-NEXT: vwmaccus.vx v8, a1, v9
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; CHECK-NEXT: ret
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%a = load <4 x i8>, ptr %x
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%b = insertelement <4 x i8> poison, i8 %y, i32 0
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%c = shufflevector <4 x i8> %b, <4 x i8> poison, <4 x i32> zeroinitializer
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%d = sext <4 x i8> %a to <4 x i16>
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%e = zext <4 x i8> %c to <4 x i16>
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%f = mul <4 x i16> %d, %e
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%g = add <4 x i16> %f, %z
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ret <4 x i16> %g
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}
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define <2 x i32> @vwmaccus_vx_v2i32(ptr %x, i16 %y, <2 x i32> %z) {
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; CHECK-LABEL: vwmaccus_vx_v2i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 2, e16, mf4, ta, ma
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; CHECK-NEXT: vle16.v v9, (a0)
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; CHECK-NEXT: vwmaccus.vx v8, a1, v9
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; CHECK-NEXT: ret
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%a = load <2 x i16>, ptr %x
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%b = insertelement <2 x i16> poison, i16 %y, i32 0
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%c = shufflevector <2 x i16> %b, <2 x i16> poison, <2 x i32> zeroinitializer
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%d = sext <2 x i16> %a to <2 x i32>
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%e = zext <2 x i16> %c to <2 x i32>
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%f = mul <2 x i32> %d, %e
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%g = add <2 x i32> %f, %z
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ret <2 x i32> %g
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}
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define <8 x i16> @vwmaccus_vx_v8i16(ptr %x, i8 %y, <8 x i16> %z) {
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; CHECK-LABEL: vwmaccus_vx_v8i16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma
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; CHECK-NEXT: vle8.v v9, (a0)
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; CHECK-NEXT: vwmaccus.vx v8, a1, v9
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; CHECK-NEXT: ret
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%a = load <8 x i8>, ptr %x
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%b = insertelement <8 x i8> poison, i8 %y, i32 0
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%c = shufflevector <8 x i8> %b, <8 x i8> poison, <8 x i32> zeroinitializer
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%d = sext <8 x i8> %a to <8 x i16>
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%e = zext <8 x i8> %c to <8 x i16>
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%f = mul <8 x i16> %d, %e
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%g = add <8 x i16> %f, %z
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ret <8 x i16> %g
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}
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define <4 x i32> @vwmaccus_vx_v4i32(ptr %x, i16 %y, <4 x i32> %z) {
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; CHECK-LABEL: vwmaccus_vx_v4i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 4, e16, mf2, ta, ma
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; CHECK-NEXT: vle16.v v9, (a0)
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; CHECK-NEXT: vwmaccus.vx v8, a1, v9
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; CHECK-NEXT: ret
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%a = load <4 x i16>, ptr %x
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%b = insertelement <4 x i16> poison, i16 %y, i32 0
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%c = shufflevector <4 x i16> %b, <4 x i16> poison, <4 x i32> zeroinitializer
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%d = sext <4 x i16> %a to <4 x i32>
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%e = zext <4 x i16> %c to <4 x i32>
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%f = mul <4 x i32> %d, %e
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%g = add <4 x i32> %f, %z
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ret <4 x i32> %g
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}
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define <2 x i64> @vwmaccus_vx_v2i64(ptr %x, i32 %y, <2 x i64> %z) {
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; CHECK-LABEL: vwmaccus_vx_v2i64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
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; CHECK-NEXT: vle32.v v9, (a0)
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; CHECK-NEXT: vwmaccus.vx v8, a1, v9
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; CHECK-NEXT: ret
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%a = load <2 x i32>, ptr %x
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%b = insertelement <2 x i32> poison, i32 %y, i64 0
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%c = shufflevector <2 x i32> %b, <2 x i32> poison, <2 x i32> zeroinitializer
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%d = sext <2 x i32> %a to <2 x i64>
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%e = zext <2 x i32> %c to <2 x i64>
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%f = mul <2 x i64> %d, %e
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%g = add <2 x i64> %f, %z
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ret <2 x i64> %g
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}
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define <16 x i16> @vwmaccus_vx_v16i16(ptr %x, i8 %y, <16 x i16> %z) {
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; CHECK-LABEL: vwmaccus_vx_v16i16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 16, e8, m1, ta, ma
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; CHECK-NEXT: vle8.v v10, (a0)
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; CHECK-NEXT: vwmaccus.vx v8, a1, v10
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; CHECK-NEXT: ret
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%a = load <16 x i8>, ptr %x
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%b = insertelement <16 x i8> poison, i8 %y, i32 0
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%c = shufflevector <16 x i8> %b, <16 x i8> poison, <16 x i32> zeroinitializer
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%d = sext <16 x i8> %a to <16 x i16>
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%e = zext <16 x i8> %c to <16 x i16>
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%f = mul <16 x i16> %d, %e
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%g = add <16 x i16> %f, %z
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ret <16 x i16> %g
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}
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define <8 x i32> @vwmaccus_vx_v8i32(ptr %x, i16 %y, <8 x i32> %z) {
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; CHECK-LABEL: vwmaccus_vx_v8i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 8, e16, m1, ta, ma
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; CHECK-NEXT: vle16.v v10, (a0)
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; CHECK-NEXT: vwmaccus.vx v8, a1, v10
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; CHECK-NEXT: ret
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%a = load <8 x i16>, ptr %x
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%b = insertelement <8 x i16> poison, i16 %y, i32 0
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%c = shufflevector <8 x i16> %b, <8 x i16> poison, <8 x i32> zeroinitializer
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%d = sext <8 x i16> %a to <8 x i32>
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%e = zext <8 x i16> %c to <8 x i32>
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%f = mul <8 x i32> %d, %e
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%g = add <8 x i32> %f, %z
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ret <8 x i32> %g
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}
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define <4 x i64> @vwmaccus_vx_v4i64(ptr %x, i32 %y, <4 x i64> %z) {
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; CHECK-LABEL: vwmaccus_vx_v4i64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
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; CHECK-NEXT: vle32.v v10, (a0)
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; CHECK-NEXT: vwmaccus.vx v8, a1, v10
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; CHECK-NEXT: ret
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%a = load <4 x i32>, ptr %x
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%b = insertelement <4 x i32> poison, i32 %y, i64 0
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%c = shufflevector <4 x i32> %b, <4 x i32> poison, <4 x i32> zeroinitializer
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%d = sext <4 x i32> %a to <4 x i64>
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%e = zext <4 x i32> %c to <4 x i64>
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%f = mul <4 x i64> %d, %e
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%g = add <4 x i64> %f, %z
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ret <4 x i64> %g
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}
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define <32 x i16> @vwmaccus_vx_v32i16(ptr %x, i8 %y, <32 x i16> %z) {
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; CHECK-LABEL: vwmaccus_vx_v32i16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: li a2, 32
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; CHECK-NEXT: vsetvli zero, a2, e8, m2, ta, ma
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; CHECK-NEXT: vle8.v v12, (a0)
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; CHECK-NEXT: vwmaccus.vx v8, a1, v12
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; CHECK-NEXT: ret
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%a = load <32 x i8>, ptr %x
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%b = insertelement <32 x i8> poison, i8 %y, i32 0
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%c = shufflevector <32 x i8> %b, <32 x i8> poison, <32 x i32> zeroinitializer
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%d = sext <32 x i8> %a to <32 x i16>
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%e = zext <32 x i8> %c to <32 x i16>
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%f = mul <32 x i16> %d, %e
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%g = add <32 x i16> %f, %z
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ret <32 x i16> %g
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}
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define <16 x i32> @vwmaccus_vx_v16i32(ptr %x, i16 %y, <16 x i32> %z) {
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; CHECK-LABEL: vwmaccus_vx_v16i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 16, e16, m2, ta, ma
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; CHECK-NEXT: vle16.v v12, (a0)
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; CHECK-NEXT: vwmaccus.vx v8, a1, v12
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; CHECK-NEXT: ret
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%a = load <16 x i16>, ptr %x
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%b = insertelement <16 x i16> poison, i16 %y, i32 0
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%c = shufflevector <16 x i16> %b, <16 x i16> poison, <16 x i32> zeroinitializer
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%d = sext <16 x i16> %a to <16 x i32>
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%e = zext <16 x i16> %c to <16 x i32>
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%f = mul <16 x i32> %d, %e
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%g = add <16 x i32> %f, %z
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ret <16 x i32> %g
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}
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define <8 x i64> @vwmaccus_vx_v8i64(ptr %x, i32 %y, <8 x i64> %z) {
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; CHECK-LABEL: vwmaccus_vx_v8i64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma
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; CHECK-NEXT: vle32.v v12, (a0)
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; CHECK-NEXT: vwmaccus.vx v8, a1, v12
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; CHECK-NEXT: ret
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%a = load <8 x i32>, ptr %x
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%b = insertelement <8 x i32> poison, i32 %y, i64 0
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%c = shufflevector <8 x i32> %b, <8 x i32> poison, <8 x i32> zeroinitializer
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%d = sext <8 x i32> %a to <8 x i64>
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%e = zext <8 x i32> %c to <8 x i64>
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%f = mul <8 x i64> %d, %e
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%g = add <8 x i64> %f, %z
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ret <8 x i64> %g
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}
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define <64 x i16> @vwmaccus_vx_v64i16(ptr %x, i8 %y, <64 x i16> %z) {
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; CHECK-LABEL: vwmaccus_vx_v64i16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: li a2, 64
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; CHECK-NEXT: vsetvli zero, a2, e8, m4, ta, ma
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; CHECK-NEXT: vle8.v v16, (a0)
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; CHECK-NEXT: vwmaccus.vx v8, a1, v16
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; CHECK-NEXT: ret
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%a = load <64 x i8>, ptr %x
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%b = insertelement <64 x i8> poison, i8 %y, i32 0
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%c = shufflevector <64 x i8> %b, <64 x i8> poison, <64 x i32> zeroinitializer
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%d = sext <64 x i8> %a to <64 x i16>
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%e = zext <64 x i8> %c to <64 x i16>
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%f = mul <64 x i16> %d, %e
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%g = add <64 x i16> %f, %z
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ret <64 x i16> %g
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}
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define <32 x i32> @vwmaccus_vx_v32i32(ptr %x, i16 %y, <32 x i32> %z) {
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; CHECK-LABEL: vwmaccus_vx_v32i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: li a2, 32
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; CHECK-NEXT: vsetvli zero, a2, e16, m4, ta, ma
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; CHECK-NEXT: vle16.v v16, (a0)
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; CHECK-NEXT: vwmaccus.vx v8, a1, v16
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; CHECK-NEXT: ret
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%a = load <32 x i16>, ptr %x
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%b = insertelement <32 x i16> poison, i16 %y, i32 0
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%c = shufflevector <32 x i16> %b, <32 x i16> poison, <32 x i32> zeroinitializer
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%d = sext <32 x i16> %a to <32 x i32>
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%e = zext <32 x i16> %c to <32 x i32>
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%f = mul <32 x i32> %d, %e
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%g = add <32 x i32> %f, %z
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ret <32 x i32> %g
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}
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define <16 x i64> @vwmaccus_vx_v16i64(ptr %x, i32 %y, <16 x i64> %z) {
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; CHECK-LABEL: vwmaccus_vx_v16i64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 16, e32, m4, ta, ma
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; CHECK-NEXT: vle32.v v16, (a0)
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; CHECK-NEXT: vwmaccus.vx v8, a1, v16
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; CHECK-NEXT: ret
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%a = load <16 x i32>, ptr %x
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%b = insertelement <16 x i32> poison, i32 %y, i64 0
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%c = shufflevector <16 x i32> %b, <16 x i32> poison, <16 x i32> zeroinitializer
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%d = sext <16 x i32> %a to <16 x i64>
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%e = zext <16 x i32> %c to <16 x i64>
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%f = mul <16 x i64> %d, %e
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%g = add <16 x i64> %f, %z
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ret <16 x i64> %g
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}
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