derek.holloway
7502bf64a4
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19 lines
1.1 KiB
LLVM
19 lines
1.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s -mtriple=riscv64 -mattr=+v -stop-after=finalize-isel | FileCheck %s
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define void @vslidedown() {
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; CHECK-LABEL: name: vslidedown
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; CHECK: bb.0.entry:
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; CHECK-NEXT: [[ADDI:%[0-9]+]]:gpr = ADDI %stack.0.v, 0
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; CHECK-NEXT: [[PseudoVLE8_V_M8_:%[0-9]+]]:vrm8 = PseudoVLE8_V_M8 $noreg, killed [[ADDI]], -1 /* vl=VLMAX */, 3 /* e8 */, 3 /* ta, ma */ :: (load (<vscale x 1 x s512>) from %ir.v, align 1)
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; CHECK-NEXT: [[ADDI1:%[0-9]+]]:gpr = ADDI %stack.1, 0
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; CHECK-NEXT: PseudoVSE8_V_M8 killed [[PseudoVLE8_V_M8_]], killed [[ADDI1]], -1 /* vl=VLMAX */, 3 /* e8 */ :: (store (<vscale x 1 x s512>) into %stack.1)
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; CHECK-NEXT: INLINEASM &"vadd.vv $0, $0, $0", sideeffect mayload maystore attdialect, mem:m, %stack.0.v, 0, mem:m, %stack.1, 0
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; CHECK-NEXT: PseudoRET
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entry:
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%v = alloca <vscale x 64 x i8>, align 1
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%0 = load <vscale x 64 x i8>, ptr %v, align 1
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call void asm sideeffect "vadd.vv $0, $0, $0", "=*imr,imr"(ptr elementtype(<vscale x 64 x i8>) %v, <vscale x 64 x i8> %0)
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ret void
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}
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