derek.holloway
7502bf64a4
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304 lines
8.7 KiB
LLVM
304 lines
8.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple riscv32 -mattr=+d,+zvfh,+v < %s \
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; RUN: -verify-machineinstrs | FileCheck %s
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; RUN: llc -mtriple riscv64 -mattr=+d,+zvfh,+v < %s \
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; RUN: -verify-machineinstrs | FileCheck %s
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; RUN: llc -mtriple riscv32 -mattr=+d,+zvfh,+v,+unaligned-vector-mem < %s \
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; RUN: -verify-machineinstrs | FileCheck --check-prefix=FAST %s
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; RUN: llc -mtriple riscv64 -mattr=+d,+zvfh,+v,+unaligned-vector-mem < %s \
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; RUN: -verify-machineinstrs | FileCheck --check-prefix=FAST %s
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define <vscale x 1 x i32> @unaligned_load_nxv1i32_a1(ptr %ptr) {
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; CHECK-LABEL: unaligned_load_nxv1i32_a1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a1, zero, e8, mf2, ta, ma
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; CHECK-NEXT: vle8.v v8, (a0)
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; CHECK-NEXT: ret
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;
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; FAST-LABEL: unaligned_load_nxv1i32_a1:
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; FAST: # %bb.0:
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; FAST-NEXT: vsetvli a1, zero, e32, mf2, ta, ma
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; FAST-NEXT: vle32.v v8, (a0)
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; FAST-NEXT: ret
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%v = load <vscale x 1 x i32>, ptr %ptr, align 1
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ret <vscale x 1 x i32> %v
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}
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define <vscale x 1 x i32> @unaligned_load_nxv1i32_a2(ptr %ptr) {
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; CHECK-LABEL: unaligned_load_nxv1i32_a2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a1, zero, e8, mf2, ta, ma
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; CHECK-NEXT: vle8.v v8, (a0)
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; CHECK-NEXT: ret
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;
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; FAST-LABEL: unaligned_load_nxv1i32_a2:
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; FAST: # %bb.0:
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; FAST-NEXT: vsetvli a1, zero, e32, mf2, ta, ma
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; FAST-NEXT: vle32.v v8, (a0)
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; FAST-NEXT: ret
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%v = load <vscale x 1 x i32>, ptr %ptr, align 2
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ret <vscale x 1 x i32> %v
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}
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define <vscale x 1 x i32> @aligned_load_nxv1i32_a4(ptr %ptr) {
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; CHECK-LABEL: aligned_load_nxv1i32_a4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a1, zero, e32, mf2, ta, ma
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; CHECK-NEXT: vle32.v v8, (a0)
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; CHECK-NEXT: ret
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;
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; FAST-LABEL: aligned_load_nxv1i32_a4:
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; FAST: # %bb.0:
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; FAST-NEXT: vsetvli a1, zero, e32, mf2, ta, ma
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; FAST-NEXT: vle32.v v8, (a0)
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; FAST-NEXT: ret
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%v = load <vscale x 1 x i32>, ptr %ptr, align 4
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ret <vscale x 1 x i32> %v
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}
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define <vscale x 1 x i64> @unaligned_load_nxv1i64_a1(ptr %ptr) {
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; CHECK-LABEL: unaligned_load_nxv1i64_a1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl1r.v v8, (a0)
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; CHECK-NEXT: ret
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;
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; FAST-LABEL: unaligned_load_nxv1i64_a1:
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; FAST: # %bb.0:
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; FAST-NEXT: vl1re64.v v8, (a0)
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; FAST-NEXT: ret
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%v = load <vscale x 1 x i64>, ptr %ptr, align 1
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ret <vscale x 1 x i64> %v
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}
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define <vscale x 1 x i64> @unaligned_load_nxv1i64_a4(ptr %ptr) {
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; CHECK-LABEL: unaligned_load_nxv1i64_a4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl1r.v v8, (a0)
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; CHECK-NEXT: ret
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;
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; FAST-LABEL: unaligned_load_nxv1i64_a4:
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; FAST: # %bb.0:
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; FAST-NEXT: vl1re64.v v8, (a0)
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; FAST-NEXT: ret
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%v = load <vscale x 1 x i64>, ptr %ptr, align 4
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ret <vscale x 1 x i64> %v
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}
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define <vscale x 1 x i64> @aligned_load_nxv1i64_a8(ptr %ptr) {
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; CHECK-LABEL: aligned_load_nxv1i64_a8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl1re64.v v8, (a0)
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; CHECK-NEXT: ret
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;
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; FAST-LABEL: aligned_load_nxv1i64_a8:
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; FAST: # %bb.0:
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; FAST-NEXT: vl1re64.v v8, (a0)
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; FAST-NEXT: ret
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%v = load <vscale x 1 x i64>, ptr %ptr, align 8
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ret <vscale x 1 x i64> %v
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}
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define <vscale x 2 x i64> @unaligned_load_nxv2i64_a1(ptr %ptr) {
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; CHECK-LABEL: unaligned_load_nxv2i64_a1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl2r.v v8, (a0)
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; CHECK-NEXT: ret
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;
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; FAST-LABEL: unaligned_load_nxv2i64_a1:
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; FAST: # %bb.0:
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; FAST-NEXT: vl2re64.v v8, (a0)
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; FAST-NEXT: ret
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%v = load <vscale x 2 x i64>, ptr %ptr, align 1
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ret <vscale x 2 x i64> %v
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}
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define <vscale x 2 x i64> @unaligned_load_nxv2i64_a4(ptr %ptr) {
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; CHECK-LABEL: unaligned_load_nxv2i64_a4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl2r.v v8, (a0)
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; CHECK-NEXT: ret
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;
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; FAST-LABEL: unaligned_load_nxv2i64_a4:
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; FAST: # %bb.0:
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; FAST-NEXT: vl2re64.v v8, (a0)
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; FAST-NEXT: ret
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%v = load <vscale x 2 x i64>, ptr %ptr, align 4
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ret <vscale x 2 x i64> %v
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}
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define <vscale x 2 x i64> @aligned_load_nxv2i64_a8(ptr %ptr) {
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; CHECK-LABEL: aligned_load_nxv2i64_a8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl2re64.v v8, (a0)
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; CHECK-NEXT: ret
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;
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; FAST-LABEL: aligned_load_nxv2i64_a8:
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; FAST: # %bb.0:
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; FAST-NEXT: vl2re64.v v8, (a0)
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; FAST-NEXT: ret
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%v = load <vscale x 2 x i64>, ptr %ptr, align 8
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ret <vscale x 2 x i64> %v
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}
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; Masks should always be aligned
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define <vscale x 1 x i1> @unaligned_load_nxv1i1_a1(ptr %ptr) {
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; CHECK-LABEL: unaligned_load_nxv1i1_a1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a1, zero, e8, mf8, ta, ma
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; CHECK-NEXT: vlm.v v0, (a0)
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; CHECK-NEXT: ret
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;
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; FAST-LABEL: unaligned_load_nxv1i1_a1:
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; FAST: # %bb.0:
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; FAST-NEXT: vsetvli a1, zero, e8, mf8, ta, ma
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; FAST-NEXT: vlm.v v0, (a0)
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; FAST-NEXT: ret
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%v = load <vscale x 1 x i1>, ptr %ptr, align 1
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ret <vscale x 1 x i1> %v
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}
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define <vscale x 4 x float> @unaligned_load_nxv4f32_a1(ptr %ptr) {
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; CHECK-LABEL: unaligned_load_nxv4f32_a1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl2r.v v8, (a0)
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; CHECK-NEXT: ret
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;
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; FAST-LABEL: unaligned_load_nxv4f32_a1:
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; FAST: # %bb.0:
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; FAST-NEXT: vl2re32.v v8, (a0)
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; FAST-NEXT: ret
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%v = load <vscale x 4 x float>, ptr %ptr, align 1
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ret <vscale x 4 x float> %v
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}
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define <vscale x 4 x float> @unaligned_load_nxv4f32_a2(ptr %ptr) {
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; CHECK-LABEL: unaligned_load_nxv4f32_a2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl2r.v v8, (a0)
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; CHECK-NEXT: ret
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;
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; FAST-LABEL: unaligned_load_nxv4f32_a2:
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; FAST: # %bb.0:
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; FAST-NEXT: vl2re32.v v8, (a0)
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; FAST-NEXT: ret
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%v = load <vscale x 4 x float>, ptr %ptr, align 2
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ret <vscale x 4 x float> %v
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}
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define <vscale x 4 x float> @aligned_load_nxv4f32_a4(ptr %ptr) {
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; CHECK-LABEL: aligned_load_nxv4f32_a4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl2re32.v v8, (a0)
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; CHECK-NEXT: ret
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;
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; FAST-LABEL: aligned_load_nxv4f32_a4:
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; FAST: # %bb.0:
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; FAST-NEXT: vl2re32.v v8, (a0)
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; FAST-NEXT: ret
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%v = load <vscale x 4 x float>, ptr %ptr, align 4
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ret <vscale x 4 x float> %v
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}
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define <vscale x 8 x half> @unaligned_load_nxv8f16_a1(ptr %ptr) {
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; CHECK-LABEL: unaligned_load_nxv8f16_a1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl2r.v v8, (a0)
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; CHECK-NEXT: ret
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;
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; FAST-LABEL: unaligned_load_nxv8f16_a1:
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; FAST: # %bb.0:
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; FAST-NEXT: vl2re16.v v8, (a0)
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; FAST-NEXT: ret
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%v = load <vscale x 8 x half>, ptr %ptr, align 1
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ret <vscale x 8 x half> %v
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}
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define <vscale x 8 x half> @aligned_load_nxv8f16_a2(ptr %ptr) {
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; CHECK-LABEL: aligned_load_nxv8f16_a2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl2re16.v v8, (a0)
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; CHECK-NEXT: ret
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;
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; FAST-LABEL: aligned_load_nxv8f16_a2:
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; FAST: # %bb.0:
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; FAST-NEXT: vl2re16.v v8, (a0)
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; FAST-NEXT: ret
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%v = load <vscale x 8 x half>, ptr %ptr, align 2
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ret <vscale x 8 x half> %v
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}
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define void @unaligned_store_nxv4i32_a1(<vscale x 4 x i32> %x, ptr %ptr) {
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; CHECK-LABEL: unaligned_store_nxv4i32_a1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vs2r.v v8, (a0)
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; CHECK-NEXT: ret
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;
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; FAST-LABEL: unaligned_store_nxv4i32_a1:
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; FAST: # %bb.0:
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; FAST-NEXT: vs2r.v v8, (a0)
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; FAST-NEXT: ret
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store <vscale x 4 x i32> %x, ptr %ptr, align 1
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ret void
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}
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define void @unaligned_store_nxv4i32_a2(<vscale x 4 x i32> %x, ptr %ptr) {
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; CHECK-LABEL: unaligned_store_nxv4i32_a2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vs2r.v v8, (a0)
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; CHECK-NEXT: ret
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;
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; FAST-LABEL: unaligned_store_nxv4i32_a2:
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; FAST: # %bb.0:
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; FAST-NEXT: vs2r.v v8, (a0)
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; FAST-NEXT: ret
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store <vscale x 4 x i32> %x, ptr %ptr, align 2
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ret void
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}
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define void @aligned_store_nxv4i32_a4(<vscale x 4 x i32> %x, ptr %ptr) {
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; CHECK-LABEL: aligned_store_nxv4i32_a4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vs2r.v v8, (a0)
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; CHECK-NEXT: ret
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;
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; FAST-LABEL: aligned_store_nxv4i32_a4:
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; FAST: # %bb.0:
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; FAST-NEXT: vs2r.v v8, (a0)
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; FAST-NEXT: ret
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store <vscale x 4 x i32> %x, ptr %ptr, align 4
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ret void
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}
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define void @unaligned_store_nxv1i16_a1(<vscale x 1 x i16> %x, ptr %ptr) {
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; CHECK-LABEL: unaligned_store_nxv1i16_a1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a1, zero, e8, mf4, ta, ma
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; CHECK-NEXT: vse8.v v8, (a0)
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; CHECK-NEXT: ret
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;
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; FAST-LABEL: unaligned_store_nxv1i16_a1:
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; FAST: # %bb.0:
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; FAST-NEXT: vsetvli a1, zero, e16, mf4, ta, ma
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; FAST-NEXT: vse16.v v8, (a0)
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; FAST-NEXT: ret
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store <vscale x 1 x i16> %x, ptr %ptr, align 1
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ret void
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}
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define void @aligned_store_nxv1i16_a2(<vscale x 1 x i16> %x, ptr %ptr) {
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; CHECK-LABEL: aligned_store_nxv1i16_a2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a1, zero, e16, mf4, ta, ma
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; CHECK-NEXT: vse16.v v8, (a0)
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; CHECK-NEXT: ret
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;
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; FAST-LABEL: aligned_store_nxv1i16_a2:
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; FAST: # %bb.0:
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; FAST-NEXT: vsetvli a1, zero, e16, mf4, ta, ma
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; FAST-NEXT: vse16.v v8, (a0)
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; FAST-NEXT: ret
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store <vscale x 1 x i16> %x, ptr %ptr, align 2
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ret void
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}
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