derek.holloway
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65 lines
3.1 KiB
LLVM
65 lines
3.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+v,+m -target-abi=ilp32d \
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; RUN: -verify-machineinstrs < %s | FileCheck --check-prefixes=CHECK,RV32 %s
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; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+v,+m -target-abi=lp64d \
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; RUN: -verify-machineinstrs < %s | FileCheck --check-prefixes=CHECK,RV64 %s
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; (-N0 * -N1) + N2 --> (N0 * N1) + N2
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define <vscale x 1 x double> @test1(<vscale x 1 x double> %a, <vscale x 1 x double> %b, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 zeroext %evl) {
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; CHECK-LABEL: test1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e64, m1, ta, ma
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; CHECK-NEXT: vfmadd.vv v8, v9, v10
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; CHECK-NEXT: ret
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%nega = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %a, <vscale x 1 x i1> %m, i32 %evl)
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%negb = call <vscale x 1 x double> @llvm.vp.fneg.nxv1f64(<vscale x 1 x double> %b, <vscale x 1 x i1> %m, i32 %evl)
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%v = call <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %nega, <vscale x 1 x double> %negb, <vscale x 1 x double> %c, <vscale x 1 x i1> %m, i32 %evl)
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ret <vscale x 1 x double> %v
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}
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; (fma x, c1, (fmul x, c2)) -> (fmul x, c1+c2)
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define <vscale x 1 x double> @test2(<vscale x 1 x double> %a, <vscale x 1 x i1> %m, i32 zeroext %evl) {
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; RV32-LABEL: test2:
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; RV32: # %bb.0:
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; RV32-NEXT: lui a0, %hi(.LCPI1_0)
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; RV32-NEXT: fld fa5, %lo(.LCPI1_0)(a0)
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; RV32-NEXT: vsetvli a0, zero, e64, m1, ta, ma
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; RV32-NEXT: vfmul.vf v8, v8, fa5
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; RV32-NEXT: ret
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;
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; RV64-LABEL: test2:
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; RV64: # %bb.0:
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; RV64-NEXT: lui a0, 2051
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; RV64-NEXT: slli a0, a0, 39
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; RV64-NEXT: fmv.d.x fa5, a0
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; RV64-NEXT: vsetvli a0, zero, e64, m1, ta, ma
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; RV64-NEXT: vfmul.vf v8, v8, fa5
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; RV64-NEXT: ret
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%t = call <vscale x 1 x double> @llvm.vp.fmul.nxv1f64(<vscale x 1 x double> %a, <vscale x 1 x double> splat (double 2.0), <vscale x 1 x i1> %m, i32 %evl)
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%v = call fast <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %a, <vscale x 1 x double> splat (double 4.0), <vscale x 1 x double> %t, <vscale x 1 x i1> %m, i32 %evl)
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ret <vscale x 1 x double> %v
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}
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; (fma (fmul x, c1), c2, y) -> (fma x, c1*c2, y)
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define <vscale x 1 x double> @test3(<vscale x 1 x double> %a, <vscale x 1 x double> %b, <vscale x 1 x i1> %m, i32 zeroext %evl) {
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; RV32-LABEL: test3:
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; RV32: # %bb.0:
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; RV32-NEXT: lui a0, %hi(.LCPI2_0)
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; RV32-NEXT: fld fa5, %lo(.LCPI2_0)(a0)
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; RV32-NEXT: vsetvli a0, zero, e64, m1, ta, ma
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; RV32-NEXT: vfmadd.vf v8, fa5, v9
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; RV32-NEXT: ret
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;
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; RV64-LABEL: test3:
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; RV64: # %bb.0:
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; RV64-NEXT: li a0, 513
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; RV64-NEXT: slli a0, a0, 53
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; RV64-NEXT: fmv.d.x fa5, a0
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; RV64-NEXT: vsetvli a0, zero, e64, m1, ta, ma
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; RV64-NEXT: vfmadd.vf v8, fa5, v9
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; RV64-NEXT: ret
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%t = call <vscale x 1 x double> @llvm.vp.fmul.nxv1f64(<vscale x 1 x double> %a, <vscale x 1 x double> splat (double 2.0), <vscale x 1 x i1> %m, i32 %evl)
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%v = call fast <vscale x 1 x double> @llvm.vp.fma.nxv1f64(<vscale x 1 x double> %t, <vscale x 1 x double> splat (double 4.0), <vscale x 1 x double> %b, <vscale x 1 x i1> %m, i32 %evl)
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ret <vscale x 1 x double> %v
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}
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