derek.holloway
7502bf64a4
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180 lines
8.0 KiB
LLVM
180 lines
8.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfh,+v,+m,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfh,+v,+m,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -mtriple=riscv32 -mattr=+d,+zvfhmin,+v,+m,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -mtriple=riscv64 -mattr=+d,+zvfhmin,+v,+m,+zvfbfmin -verify-machineinstrs < %s | FileCheck %s
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define <vscale x 2 x half> @vfptrunc_nxv2f16_nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> %m, i32 zeroext %vl) {
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; CHECK-LABEL: vfptrunc_nxv2f16_nxv2f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
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; CHECK-NEXT: vfncvt.f.f.w v9, v8
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; CHECK-NEXT: vmv1r.v v8, v9
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; CHECK-NEXT: ret
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%v = call <vscale x 2 x half> @llvm.vp.fptrunc.nxv2f16.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> %m, i32 %vl)
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ret <vscale x 2 x half> %v
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}
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define <vscale x 2 x half> @vfptrunc_nxv2f16_nxv2f32_unmasked(<vscale x 2 x float> %a, i32 zeroext %vl) {
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; CHECK-LABEL: vfptrunc_nxv2f16_nxv2f32_unmasked:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
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; CHECK-NEXT: vfncvt.f.f.w v9, v8
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; CHECK-NEXT: vmv1r.v v8, v9
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; CHECK-NEXT: ret
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%v = call <vscale x 2 x half> @llvm.vp.fptrunc.nxv2f16.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> splat (i1 true), i32 %vl)
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ret <vscale x 2 x half> %v
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}
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define <vscale x 2 x half> @vfptrunc_nxv2f16_nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x i1> %m, i32 zeroext %vl) {
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; CHECK-LABEL: vfptrunc_nxv2f16_nxv2f64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma
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; CHECK-NEXT: vfncvt.rod.f.f.w v10, v8
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; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma
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; CHECK-NEXT: vfncvt.f.f.w v8, v10
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; CHECK-NEXT: ret
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%v = call <vscale x 2 x half> @llvm.vp.fptrunc.nxv2f16.nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x i1> %m, i32 %vl)
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ret <vscale x 2 x half> %v
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}
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define <vscale x 2 x half> @vfptrunc_nxv2f16_nxv2f64_unmasked(<vscale x 2 x double> %a, i32 zeroext %vl) {
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; CHECK-LABEL: vfptrunc_nxv2f16_nxv2f64_unmasked:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma
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; CHECK-NEXT: vfncvt.rod.f.f.w v10, v8
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; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma
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; CHECK-NEXT: vfncvt.f.f.w v8, v10
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; CHECK-NEXT: ret
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%v = call <vscale x 2 x half> @llvm.vp.fptrunc.nxv2f16.nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x i1> splat (i1 true), i32 %vl)
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ret <vscale x 2 x half> %v
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}
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define <vscale x 2 x float> @vfptrunc_nxv2f32_nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x i1> %m, i32 zeroext %vl) {
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; CHECK-LABEL: vfptrunc_nxv2f32_nxv2f64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma
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; CHECK-NEXT: vfncvt.f.f.w v10, v8
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; CHECK-NEXT: vmv.v.v v8, v10
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; CHECK-NEXT: ret
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%v = call <vscale x 2 x float> @llvm.vp.fptrunc.nxv2f64.nxv2f32(<vscale x 2 x double> %a, <vscale x 2 x i1> %m, i32 %vl)
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ret <vscale x 2 x float> %v
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}
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define <vscale x 2 x float> @vfptrunc_nxv2f32_nxv2f64_unmasked(<vscale x 2 x double> %a, i32 zeroext %vl) {
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; CHECK-LABEL: vfptrunc_nxv2f32_nxv2f64_unmasked:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma
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; CHECK-NEXT: vfncvt.f.f.w v10, v8
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; CHECK-NEXT: vmv.v.v v8, v10
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; CHECK-NEXT: ret
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%v = call <vscale x 2 x float> @llvm.vp.fptrunc.nxv2f64.nxv2f32(<vscale x 2 x double> %a, <vscale x 2 x i1> splat (i1 true), i32 %vl)
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ret <vscale x 2 x float> %v
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}
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define <vscale x 7 x float> @vfptrunc_nxv7f32_nxv7f64(<vscale x 7 x double> %a, <vscale x 7 x i1> %m, i32 zeroext %vl) {
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; CHECK-LABEL: vfptrunc_nxv7f32_nxv7f64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma
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; CHECK-NEXT: vfncvt.f.f.w v16, v8
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; CHECK-NEXT: vmv.v.v v8, v16
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; CHECK-NEXT: ret
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%v = call <vscale x 7 x float> @llvm.vp.fptrunc.nxv7f64.nxv7f32(<vscale x 7 x double> %a, <vscale x 7 x i1> %m, i32 %vl)
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ret <vscale x 7 x float> %v
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}
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define <vscale x 16 x float> @vfptrunc_nxv16f32_nxv16f64(<vscale x 16 x double> %a, <vscale x 16 x i1> %m, i32 zeroext %vl) {
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; CHECK-LABEL: vfptrunc_nxv16f32_nxv16f64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e32, m4, ta, ma
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; CHECK-NEXT: vfncvt.f.f.w v24, v8
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; CHECK-NEXT: vfncvt.f.f.w v28, v16
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; CHECK-NEXT: vmv8r.v v8, v24
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; CHECK-NEXT: ret
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%v = call <vscale x 16 x float> @llvm.vp.fptrunc.nxv16f64.nxv16f32(<vscale x 16 x double> %a, <vscale x 16 x i1> %m, i32 %vl)
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ret <vscale x 16 x float> %v
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}
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define <vscale x 32 x float> @vfptrunc_nxv32f32_nxv32f64(<vscale x 32 x double> %a, <vscale x 32 x i1> %m, i32 zeroext %vl) {
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; CHECK-LABEL: vfptrunc_nxv32f32_nxv32f64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: addi sp, sp, -16
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: csrr a1, vlenb
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; CHECK-NEXT: slli a1, a1, 3
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; CHECK-NEXT: sub sp, sp, a1
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; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x72, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0xa2, 0x38, 0x00, 0x1e, 0x22 # sp + 16 + 8 * vlenb
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; CHECK-NEXT: addi a1, sp, 16
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; CHECK-NEXT: vs8r.v v16, (a1) # vscale x 64-byte Folded Spill
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; CHECK-NEXT: vsetvli a1, zero, e32, m4, ta, ma
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; CHECK-NEXT: vmv8r.v v0, v8
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; CHECK-NEXT: csrr a1, vlenb
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; CHECK-NEXT: vl8re64.v v16, (a0)
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; CHECK-NEXT: slli a1, a1, 3
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; CHECK-NEXT: add a0, a0, a1
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; CHECK-NEXT: vl8re64.v v8, (a0)
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; CHECK-NEXT: vfncvt.f.f.w v24, v0
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; CHECK-NEXT: vfncvt.f.f.w v0, v16
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; CHECK-NEXT: vfncvt.f.f.w v4, v8
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; CHECK-NEXT: addi a0, sp, 16
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; CHECK-NEXT: vl8r.v v8, (a0) # vscale x 64-byte Folded Reload
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; CHECK-NEXT: vfncvt.f.f.w v28, v8
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; CHECK-NEXT: vmv8r.v v8, v24
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; CHECK-NEXT: vmv8r.v v16, v0
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; CHECK-NEXT: csrr a0, vlenb
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; CHECK-NEXT: slli a0, a0, 3
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; CHECK-NEXT: add sp, sp, a0
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; CHECK-NEXT: .cfi_def_cfa sp, 16
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; CHECK-NEXT: addi sp, sp, 16
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; CHECK-NEXT: .cfi_def_cfa_offset 0
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; CHECK-NEXT: ret
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%v = call <vscale x 32 x float> @llvm.vp.fptrunc.nxv32f64.nxv32f32(<vscale x 32 x double> %a, <vscale x 32 x i1> %m, i32 %vl)
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ret <vscale x 32 x float> %v
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}
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define <vscale x 2 x bfloat> @vfptrunc_nxv2bf16_nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> %m, i32 zeroext %vl) {
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; CHECK-LABEL: vfptrunc_nxv2bf16_nxv2f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
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; CHECK-NEXT: vfncvtbf16.f.f.w v9, v8
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; CHECK-NEXT: vmv1r.v v8, v9
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; CHECK-NEXT: ret
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%v = call <vscale x 2 x bfloat> @llvm.vp.fptrunc.nxv2bf16.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> %m, i32 %vl)
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ret <vscale x 2 x bfloat> %v
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}
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define <vscale x 2 x bfloat> @vfptrunc_nxv2bf16_nxv2f32_unmasked(<vscale x 2 x float> %a, i32 zeroext %vl) {
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; CHECK-LABEL: vfptrunc_nxv2bf16_nxv2f32_unmasked:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
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; CHECK-NEXT: vfncvtbf16.f.f.w v9, v8
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; CHECK-NEXT: vmv1r.v v8, v9
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; CHECK-NEXT: ret
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%v = call <vscale x 2 x bfloat> @llvm.vp.fptrunc.nxv2bf16.nxv2f32(<vscale x 2 x float> %a, <vscale x 2 x i1> splat (i1 true), i32 %vl)
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ret <vscale x 2 x bfloat> %v
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}
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define <vscale x 2 x bfloat> @vfptrunc_nxv2bf16_nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x i1> %m, i32 zeroext %vl) {
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; CHECK-LABEL: vfptrunc_nxv2bf16_nxv2f64:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma
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; CHECK-NEXT: vfncvt.rod.f.f.w v10, v8
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; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma
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; CHECK-NEXT: vfncvtbf16.f.f.w v8, v10
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; CHECK-NEXT: ret
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%v = call <vscale x 2 x bfloat> @llvm.vp.fptrunc.nxv2bf16.nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x i1> %m, i32 %vl)
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ret <vscale x 2 x bfloat> %v
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}
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define <vscale x 2 x bfloat> @vfptrunc_nxv2bf16_nxv2f64_unmasked(<vscale x 2 x double> %a, i32 zeroext %vl) {
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; CHECK-LABEL: vfptrunc_nxv2bf16_nxv2f64_unmasked:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e32, m1, ta, ma
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; CHECK-NEXT: vfncvt.rod.f.f.w v10, v8
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; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma
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; CHECK-NEXT: vfncvtbf16.f.f.w v8, v10
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; CHECK-NEXT: ret
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%v = call <vscale x 2 x bfloat> @llvm.vp.fptrunc.nxv2bf16.nxv2f64(<vscale x 2 x double> %a, <vscale x 2 x i1> splat (i1 true), i32 %vl)
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ret <vscale x 2 x bfloat> %v
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}
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