derek.holloway
7502bf64a4
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71 lines
2.9 KiB
LLVM
71 lines
2.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v,+zvl512b -verify-machineinstrs | FileCheck %s
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; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v,+zvl512b -verify-machineinstrs | FileCheck %s
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define <2 x i32> @vdot_lane_s32(<2 x i32> noundef %var_1, <8 x i8> noundef %var_3, <8 x i8> noundef %var_5, <8 x i16> %x) {
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; CHECK-LABEL: vdot_lane_s32:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetivli zero, 4, e16, mf4, ta, ma
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; CHECK-NEXT: vnsrl.wi v8, v11, 0
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; CHECK-NEXT: vnsrl.wi v9, v11, 16
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; CHECK-NEXT: li a0, 32
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; CHECK-NEXT: vwadd.vv v10, v8, v9
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; CHECK-NEXT: vsetivli zero, 2, e32, mf2, ta, ma
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; CHECK-NEXT: vnsrl.wi v8, v10, 0
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; CHECK-NEXT: vnsrl.wx v9, v10, a0
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; CHECK-NEXT: vadd.vv v8, v8, v9
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; CHECK-NEXT: ret
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entry:
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%a = shufflevector <8 x i16> %x, <8 x i16> poison, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
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%b = shufflevector <8 x i16> %x, <8 x i16> poison, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
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%c = sext <4 x i16> %a to <4 x i32>
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%d = sext <4 x i16> %b to <4 x i32>
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%e = add nsw <4 x i32> %c, %d
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%z10 = shufflevector <4 x i32> %e, <4 x i32> poison, <2 x i32> <i32 0, i32 2>
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%z11 = shufflevector <4 x i32> %e, <4 x i32> poison, <2 x i32> <i32 1, i32 3>
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%y12 = add <2 x i32> %z10, %z11
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ret <2 x i32> %y12
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}
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define <vscale x 2 x i16> @intrinsic_vnsrl_wv_nxv2i16_nxv2i32_nxv2i16(<vscale x 2 x i16> %a, <vscale x 2 x i16> %b, iXLen %2, <vscale x 2 x i32> %3, <vscale x 2 x i32> %4, <vscale x 2 x i16> %z) nounwind {
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; CHECK-LABEL: intrinsic_vnsrl_wv_nxv2i16_nxv2i32_nxv2i16:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
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; CHECK-NEXT: vwadd.vv v10, v8, v9
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; CHECK-NEXT: vnsrl.wv v8, v10, v12
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; CHECK-NEXT: ret
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entry:
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%c = sext <vscale x 2 x i16> %a to <vscale x 2 x i32>
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%d = sext <vscale x 2 x i16> %b to <vscale x 2 x i32>
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%v1 = add <vscale x 2 x i32> %c, %d
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%x = call <vscale x 2 x i16> @llvm.riscv.vnsrl.nxv2i16.nxv2i32.nxv2i16(
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<vscale x 2 x i16> poison,
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<vscale x 2 x i32> %v1,
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<vscale x 2 x i16> %z,
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iXLen %2)
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ret <vscale x 2 x i16> %x
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}
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define <vscale x 2 x i16> @vnclip(<vscale x 2 x i16> %a, <vscale x 2 x i16> %b, iXLen %2, <vscale x 2 x i32> %3, <vscale x 2 x i32> %4, <vscale x 2 x i16> %z) nounwind {
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; CHECK-LABEL: vnclip:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
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; CHECK-NEXT: vwadd.vv v10, v8, v9
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; CHECK-NEXT: csrwi vxrm, 0
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; CHECK-NEXT: vnclip.wv v8, v10, v12
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; CHECK-NEXT: ret
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entry:
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%c = sext <vscale x 2 x i16> %a to <vscale x 2 x i32>
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%d = sext <vscale x 2 x i16> %b to <vscale x 2 x i32>
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%v1 = add <vscale x 2 x i32> %c, %d
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%x = call <vscale x 2 x i16> @llvm.riscv.vnclip.nxv2i16.nxv2i32.nxv2i16(
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<vscale x 2 x i16> poison,
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<vscale x 2 x i32> %v1,
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<vscale x 2 x i16> %z,
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iXLen 0, iXLen %2)
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ret <vscale x 2 x i16> %x
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}
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