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97 lines
2.8 KiB
LLVM
97 lines
2.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v \
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; RUN: -verify-machineinstrs | FileCheck %s
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; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v \
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; RUN: -verify-machineinstrs | FileCheck %s
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define <vscale x 1 x i1> @intrinsic_vmset_m_pseudo_nxv1i1(iXLen %0) nounwind {
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; CHECK-LABEL: intrinsic_vmset_m_pseudo_nxv1i1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma
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; CHECK-NEXT: vmset.m v0
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; CHECK-NEXT: ret
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entry:
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%a = call <vscale x 1 x i1> @llvm.riscv.vmset.nxv1i1(
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iXLen %0)
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ret <vscale x 1 x i1> %a
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}
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define <vscale x 2 x i1> @intrinsic_vmset_m_pseudo_nxv2i1(iXLen %0) nounwind {
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; CHECK-LABEL: intrinsic_vmset_m_pseudo_nxv2i1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetvli zero, a0, e8, mf4, ta, ma
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; CHECK-NEXT: vmset.m v0
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; CHECK-NEXT: ret
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entry:
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%a = call <vscale x 2 x i1> @llvm.riscv.vmset.nxv2i1(
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iXLen %0)
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ret <vscale x 2 x i1> %a
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}
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define <vscale x 4 x i1> @intrinsic_vmset_m_pseudo_nxv4i1(iXLen %0) nounwind {
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; CHECK-LABEL: intrinsic_vmset_m_pseudo_nxv4i1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma
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; CHECK-NEXT: vmset.m v0
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; CHECK-NEXT: ret
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entry:
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%a = call <vscale x 4 x i1> @llvm.riscv.vmset.nxv4i1(
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iXLen %0)
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ret <vscale x 4 x i1> %a
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}
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define <vscale x 8 x i1> @intrinsic_vmset_m_pseudo_nxv8i1(iXLen %0) nounwind {
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; CHECK-LABEL: intrinsic_vmset_m_pseudo_nxv8i1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma
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; CHECK-NEXT: vmset.m v0
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; CHECK-NEXT: ret
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entry:
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%a = call <vscale x 8 x i1> @llvm.riscv.vmset.nxv8i1(
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iXLen %0)
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ret <vscale x 8 x i1> %a
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}
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define <vscale x 16 x i1> @intrinsic_vmset_m_pseudo_nxv16i1(iXLen %0) nounwind {
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; CHECK-LABEL: intrinsic_vmset_m_pseudo_nxv16i1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetvli zero, a0, e8, m2, ta, ma
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; CHECK-NEXT: vmset.m v0
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; CHECK-NEXT: ret
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entry:
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%a = call <vscale x 16 x i1> @llvm.riscv.vmset.nxv16i1(
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iXLen %0)
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ret <vscale x 16 x i1> %a
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}
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define <vscale x 32 x i1> @intrinsic_vmset_m_pseudo_nxv32i1(iXLen %0) nounwind {
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; CHECK-LABEL: intrinsic_vmset_m_pseudo_nxv32i1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetvli zero, a0, e8, m4, ta, ma
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; CHECK-NEXT: vmset.m v0
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; CHECK-NEXT: ret
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entry:
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%a = call <vscale x 32 x i1> @llvm.riscv.vmset.nxv32i1(
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iXLen %0)
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ret <vscale x 32 x i1> %a
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}
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define <vscale x 64 x i1> @intrinsic_vmset_m_pseudo_nxv64i1(iXLen %0) nounwind {
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; CHECK-LABEL: intrinsic_vmset_m_pseudo_nxv64i1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vsetvli zero, a0, e8, m8, ta, ma
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; CHECK-NEXT: vmset.m v0
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; CHECK-NEXT: ret
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entry:
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%a = call <vscale x 64 x i1> @llvm.riscv.vmset.nxv64i1(
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iXLen %0)
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ret <vscale x 64 x i1> %a
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}
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