derek.holloway
7502bf64a4
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259 lines
14 KiB
LLVM
259 lines
14 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v -verify-machineinstrs | FileCheck %s
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; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs | FileCheck %s
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define <vscale x 4 x i32> @vadd(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen %vl) {
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; CHECK-LABEL: vadd:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli zero, a0, e32, m2, tu, ma
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; CHECK-NEXT: vadd.vv v8, v10, v12
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; CHECK-NEXT: ret
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%v = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen %vl)
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%w = call <vscale x 4 x i32> @llvm.riscv.vmv.v.v.nxv4i32(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %v, iXLen %vl)
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ret <vscale x 4 x i32> %w
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}
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define <vscale x 4 x i32> @vadd_mask(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i1> %m, iXLen %vl) {
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; CHECK-LABEL: vadd_mask:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli zero, a0, e32, m2, tu, mu
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; CHECK-NEXT: vadd.vv v8, v10, v12, v0.t
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; CHECK-NEXT: ret
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%v = call <vscale x 4 x i32> @llvm.riscv.vadd.mask.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i1> %m, iXLen %vl, iXLen 3)
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%w = call <vscale x 4 x i32> @llvm.riscv.vmv.v.v.nxv4i32(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %v, iXLen %vl)
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ret <vscale x 4 x i32> %w
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}
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define <vscale x 4 x i32> @vadd_undef(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen %vl) {
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; CHECK-LABEL: vadd_undef:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma
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; CHECK-NEXT: vadd.vv v8, v8, v10
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; CHECK-NEXT: ret
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%v = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen %vl)
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%w = call <vscale x 4 x i32> @llvm.riscv.vmv.v.v.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %v, iXLen %vl)
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ret <vscale x 4 x i32> %w
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}
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define <vscale x 4 x i32> @vadd_same_passthru(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen %vl) {
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; CHECK-LABEL: vadd_same_passthru:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli zero, a0, e32, m2, tu, ma
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; CHECK-NEXT: vadd.vv v8, v10, v12
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; CHECK-NEXT: ret
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%v = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen %vl)
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%w = call <vscale x 4 x i32> @llvm.riscv.vmv.v.v.nxv4i32(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %v, iXLen %vl)
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ret <vscale x 4 x i32> %w
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}
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define <vscale x 4 x i32> @unfoldable_diff_avl_unknown(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen %vl1, iXLen %vl2) {
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; CHECK-LABEL: unfoldable_diff_avl_unknown:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli zero, a0, e32, m2, tu, ma
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; CHECK-NEXT: vmv2r.v v14, v8
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; CHECK-NEXT: vadd.vv v14, v10, v12
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; CHECK-NEXT: vsetvli zero, a1, e32, m2, tu, ma
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; CHECK-NEXT: vmv.v.v v8, v14
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; CHECK-NEXT: ret
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%v = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen %vl1)
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%w = call <vscale x 4 x i32> @llvm.riscv.vmv.v.v.nxv4i32(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %v, iXLen %vl2)
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ret <vscale x 4 x i32> %w
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}
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define <vscale x 4 x i32> @diff_avl_known(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {
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; CHECK-LABEL: diff_avl_known:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 4, e32, m2, tu, ma
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; CHECK-NEXT: vadd.vv v8, v10, v12
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; CHECK-NEXT: ret
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%v = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen 4)
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%w = call <vscale x 4 x i32> @llvm.riscv.vmv.v.v.nxv4i32(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %v, iXLen 8)
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ret <vscale x 4 x i32> %w
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}
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define <vscale x 4 x i32> @diff_avl_vlmax(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen %vl) {
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; CHECK-LABEL: diff_avl_vlmax:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli zero, a0, e32, m2, tu, ma
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; CHECK-NEXT: vadd.vv v8, v10, v12
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; CHECK-NEXT: ret
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%v = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen -1)
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%w = call <vscale x 4 x i32> @llvm.riscv.vmv.v.v.nxv4i32(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %v, iXLen %vl)
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ret <vscale x 4 x i32> %w
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}
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define <vscale x 4 x i32> @diff_avl_non_uimm5(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b) {
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; CHECK-LABEL: diff_avl_non_uimm5:
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; CHECK: # %bb.0:
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; CHECK-NEXT: li a0, 42
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; CHECK-NEXT: vsetvli zero, a0, e32, m2, tu, ma
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; CHECK-NEXT: vadd.vv v8, v10, v12
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; CHECK-NEXT: ret
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%v = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen 42)
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%w = call <vscale x 4 x i32> @llvm.riscv.vmv.v.v.nxv4i32(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %v, iXLen 123)
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ret <vscale x 4 x i32> %w
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}
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define <vscale x 4 x i32> @vadd_mask_ma(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i1> %mask, iXLen %vl) {
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; CHECK-LABEL: vadd_mask_ma:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli zero, a0, e32, m2, tu, mu
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; CHECK-NEXT: vadd.vv v8, v10, v12, v0.t
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; CHECK-NEXT: ret
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%v = call <vscale x 4 x i32> @llvm.riscv.vadd.mask.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i1> %mask, iXLen %vl, iXLen 2)
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%w = call <vscale x 4 x i32> @llvm.riscv.vmv.v.v.nxv4i32(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %v, iXLen %vl)
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ret <vscale x 4 x i32> %w
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}
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define <vscale x 4 x i32> @vadd_mask_mu(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i1> %mask, iXLen %vl) {
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; CHECK-LABEL: vadd_mask_mu:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli zero, a0, e32, m2, tu, mu
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; CHECK-NEXT: vadd.vv v8, v10, v12, v0.t
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; CHECK-NEXT: ret
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%v = call <vscale x 4 x i32> @llvm.riscv.vadd.mask.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, <vscale x 4 x i1> %mask, iXLen %vl, iXLen 0)
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%w = call <vscale x 4 x i32> @llvm.riscv.vmv.v.v.nxv4i32(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %v, iXLen %vl)
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ret <vscale x 4 x i32> %w
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}
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define <vscale x 4 x i32> @foldable_load(<vscale x 4 x i32> %passthru, ptr %p) {
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; CHECK-LABEL: foldable_load:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 2, e32, m2, tu, ma
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; CHECK-NEXT: vle32.v v8, (a0)
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; CHECK-NEXT: ret
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%v = call <vscale x 4 x i32> @llvm.riscv.vle.nxv4i32(<vscale x 4 x i32> poison, ptr %p, iXLen 4)
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%w = call <vscale x 4 x i32> @llvm.riscv.vmv.v.v.nxv4i32(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %v, iXLen 2)
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ret <vscale x 4 x i32> %w
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}
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; Can't fold this as the VLs aren't constant.
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define <vscale x 4 x i32> @unfoldable_load(<vscale x 4 x i32> %passthru, ptr %p, iXLen %vl1, iXLen %vl2) {
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; CHECK-LABEL: unfoldable_load:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli zero, a1, e32, m2, ta, ma
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; CHECK-NEXT: vle32.v v10, (a0)
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; CHECK-NEXT: vsetvli zero, a2, e32, m2, tu, ma
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; CHECK-NEXT: vmv.v.v v8, v10
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; CHECK-NEXT: ret
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%v = call <vscale x 4 x i32> @llvm.riscv.vle.nxv4i32(<vscale x 4 x i32> poison, ptr %p, iXLen %vl1)
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%w = call <vscale x 4 x i32> @llvm.riscv.vmv.v.v.nxv4i32(<vscale x 4 x i32> %passthru, <vscale x 4 x i32> %v, iXLen %vl2)
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ret <vscale x 4 x i32> %w
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}
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define <vscale x 4 x float> @unfoldable_vfadd(<vscale x 4 x float> %passthru, <vscale x 4 x float> %a, <vscale x 4 x float> %b, iXLen %vl1, iXLen %vl2) {
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; CHECK-LABEL: unfoldable_vfadd:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma
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; CHECK-NEXT: vfadd.vv v10, v10, v12
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; CHECK-NEXT: vsetvli zero, a1, e32, m2, tu, ma
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; CHECK-NEXT: vmv.v.v v8, v10
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; CHECK-NEXT: ret
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%v = call <vscale x 4 x float> @llvm.riscv.vfadd.nxv4f32.nxv4f32(<vscale x 4 x float> poison, <vscale x 4 x float> %a, <vscale x 4 x float> %b, iXLen 7, iXLen %vl1)
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%w = call <vscale x 4 x float> @llvm.riscv.vmv.v.v.nxv4f32(<vscale x 4 x float> %passthru, <vscale x 4 x float> %v, iXLen %vl2)
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ret <vscale x 4 x float> %w
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}
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define <vscale x 4 x float> @foldable_vfadd(<vscale x 4 x float> %passthru, <vscale x 4 x float> %a, <vscale x 4 x float> %b, iXLen %vl) {
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; CHECK-LABEL: foldable_vfadd:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli zero, a0, e32, m2, tu, ma
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; CHECK-NEXT: vfadd.vv v8, v10, v12
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; CHECK-NEXT: ret
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%v = call <vscale x 4 x float> @llvm.riscv.vfadd.nxv4f32.nxv4f32(<vscale x 4 x float> poison, <vscale x 4 x float> %a, <vscale x 4 x float> %b, iXLen 7, iXLen %vl)
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%w = call <vscale x 4 x float> @llvm.riscv.vmv.v.v.nxv4f32(<vscale x 4 x float> %passthru, <vscale x 4 x float> %v, iXLen %vl)
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ret <vscale x 4 x float> %w
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}
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; This shouldn't be folded because we need to preserve exceptions with
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; "fpexcept.strict" exception behaviour, and changing the VL may hide them.
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define <vscale x 4 x float> @unfoldable_constrained_fadd(<vscale x 4 x float> %passthru, <vscale x 4 x float> %x, <vscale x 4 x float> %y, iXLen %vl) strictfp {
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; CHECK-LABEL: unfoldable_constrained_fadd:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a1, zero, e32, m2, ta, ma
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; CHECK-NEXT: vfadd.vv v10, v10, v12
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; CHECK-NEXT: vsetvli zero, a0, e32, m2, tu, ma
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; CHECK-NEXT: vmv.v.v v8, v10
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; CHECK-NEXT: ret
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%a = call <vscale x 4 x float> @llvm.experimental.constrained.fadd(<vscale x 4 x float> %x, <vscale x 4 x float> %y, metadata !"round.dynamic", metadata !"fpexcept.strict") strictfp
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%b = call <vscale x 4 x float> @llvm.riscv.vmv.v.v.nxv4f32(<vscale x 4 x float> %passthru, <vscale x 4 x float> %a, iXLen %vl) strictfp
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ret <vscale x 4 x float> %b
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}
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define <vscale x 2 x i32> @unfoldable_vredsum(<vscale x 2 x i32> %passthru, <vscale x 4 x i32> %x, <vscale x 2 x i32> %y) {
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; CHECK-LABEL: unfoldable_vredsum:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma
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; CHECK-NEXT: vredsum.vs v9, v10, v9
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; CHECK-NEXT: vsetivli zero, 1, e32, m1, tu, ma
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; CHECK-NEXT: vmv.v.v v8, v9
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; CHECK-NEXT: ret
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%a = call <vscale x 2 x i32> @llvm.riscv.vredsum.nxv2i32.nxv4i32(<vscale x 2 x i32> poison, <vscale x 4 x i32> %x, <vscale x 2 x i32> %y, iXLen -1)
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%b = call <vscale x 2 x i32> @llvm.riscv.vmv.v.v.nxv2i32(<vscale x 2 x i32> %passthru, <vscale x 2 x i32> %a, iXLen 1)
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ret <vscale x 2 x i32> %b
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}
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define <vscale x 2 x i32> @unfoldable_mismatched_sew(<vscale x 2 x i32> %passthru, <vscale x 1 x i64> %x, <vscale x 1 x i64> %y, iXLen %avl) {
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; CHECK-LABEL: unfoldable_mismatched_sew:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma
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; CHECK-NEXT: vadd.vv v9, v9, v10
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; CHECK-NEXT: vsetvli zero, a0, e32, m1, tu, ma
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; CHECK-NEXT: vmv.v.v v8, v9
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; CHECK-NEXT: ret
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%a = call <vscale x 1 x i64> @llvm.riscv.vadd.nxv1i64.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %x, <vscale x 1 x i64> %y, iXLen %avl)
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%a.bitcast = bitcast <vscale x 1 x i64> %a to <vscale x 2 x i32>
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%b = call <vscale x 2 x i32> @llvm.riscv.vmv.v.v.nxv2i32(<vscale x 2 x i32> %passthru, <vscale x 2 x i32> %a.bitcast, iXLen %avl)
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ret <vscale x 2 x i32> %b
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}
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define <vscale x 1 x i64> @undef_passthru(<vscale x 1 x i64> %passthru, <vscale x 1 x i64> %x, <vscale x 1 x i64> %y, iXLen %avl) {
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; CHECK-LABEL: undef_passthru:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma
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; CHECK-NEXT: vadd.vv v8, v9, v10
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; CHECK-NEXT: ret
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%a = call <vscale x 1 x i64> @llvm.riscv.vadd.nxv1i64.nxv1i64(<vscale x 1 x i64> %passthru, <vscale x 1 x i64> %x, <vscale x 1 x i64> %y, iXLen %avl)
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%b = call <vscale x 1 x i64> @llvm.riscv.vmv.v.v.nxv1i64(<vscale x 1 x i64> poison, <vscale x 1 x i64> %a, iXLen %avl)
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ret <vscale x 1 x i64> %b
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}
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; Check that we can fold into vle64ff.v even if we need to move it past the
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; passthru and it's safe.
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define <vscale x 1 x i64> @vleff_move_past_passthru(ptr %p, ptr %q, iXLen %avl) {
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; CHECK-LABEL: vleff_move_past_passthru:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vl1re64.v v8, (a1)
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; CHECK-NEXT: vsetvli zero, a2, e64, m1, tu, ma
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; CHECK-NEXT: vle64ff.v v8, (a0)
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; CHECK-NEXT: ret
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%a = call { <vscale x 1 x i64>, iXLen } @llvm.riscv.vleff(<vscale x 1 x i64> poison, ptr %p, iXLen %avl)
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%vec = extractvalue { <vscale x 1 x i64>, iXLen } %a, 0
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%passthru = load <vscale x 1 x i64>, ptr %q
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%b = call <vscale x 1 x i64> @llvm.riscv.vmv.v.v.nxv1i64(<vscale x 1 x i64> %passthru, <vscale x 1 x i64> %vec, iXLen %avl)
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ret <vscale x 1 x i64> %b
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}
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define <vscale x 1 x i64> @vmerge(<vscale x 1 x i64> %passthru, <vscale x 1 x i64> %x, <vscale x 1 x i64> %y, <vscale x 1 x i1> %m, iXLen %avl) {
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; CHECK-LABEL: vmerge:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli zero, a0, e64, m1, tu, ma
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; CHECK-NEXT: vmerge.vvm v8, v9, v10, v0
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; CHECK-NEXT: ret
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%a = call <vscale x 1 x i64> @llvm.riscv.vmerge.nxv1i64.nxv1i64(<vscale x 1 x i64> %passthru, <vscale x 1 x i64> %x, <vscale x 1 x i64> %y, <vscale x 1 x i1> %m, iXLen %avl)
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%b = call <vscale x 1 x i64> @llvm.riscv.vmv.v.v.nxv1i64(<vscale x 1 x i64> %passthru, <vscale x 1 x i64> %a, iXLen %avl)
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ret <vscale x 1 x i64> %b
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}
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|
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define <vscale x 4 x float> @commute_vfmadd(<vscale x 4 x float> %passthru, <vscale x 4 x float> %a, <vscale x 4 x float> %b, iXLen %vl) {
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; CHECK-LABEL: commute_vfmadd:
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; CHECK: # %bb.0:
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|
; CHECK-NEXT: vsetvli zero, a0, e32, m2, tu, ma
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|
; CHECK-NEXT: vfmacc.vv v8, v12, v10
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; CHECK-NEXT: ret
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%v = call <vscale x 4 x float> @llvm.riscv.vfmadd(<vscale x 4 x float> %a, <vscale x 4 x float> %b, <vscale x 4 x float> %passthru, iXLen 7, iXLen %vl, iXLen 3)
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%w = call <vscale x 4 x float> @llvm.riscv.vmv.v.v(<vscale x 4 x float> %passthru, <vscale x 4 x float> %v, iXLen %vl)
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ret <vscale x 4 x float> %w
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|
}
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