derek.holloway
7502bf64a4
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135 lines
6.9 KiB
LLVM
135 lines
6.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=riscv32 -mattr=+f,+v -verify-machineinstrs < %s | FileCheck %s
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; RUN: llc -mtriple=riscv64 -mattr=+f,+v -verify-machineinstrs < %s | FileCheck %s
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define void @test_store_reverse_combiner(<vscale x 2 x float> %val, <vscale x 2 x float>* %ptr, i32 zeroext %evl) {
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; CHECK-LABEL: test_store_reverse_combiner:
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; CHECK: # %bb.0:
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; CHECK-NEXT: slli a2, a1, 2
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; CHECK-NEXT: add a0, a2, a0
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; CHECK-NEXT: addi a0, a0, -4
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; CHECK-NEXT: li a2, -4
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; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
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; CHECK-NEXT: vsse32.v v8, (a0), a2
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; CHECK-NEXT: ret
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%rev = call <vscale x 2 x float> @llvm.experimental.vp.reverse.nxv2f32(<vscale x 2 x float> %val, <vscale x 2 x i1> splat (i1 true), i32 %evl)
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call void @llvm.vp.store.nxv2f32.p0nxv2f32(<vscale x 2 x float> %rev, <vscale x 2 x float>* %ptr, <vscale x 2 x i1> splat (i1 true), i32 %evl)
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ret void
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}
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define void @test_store_mask_is_vp_reverse(<vscale x 2 x float> %val, <vscale x 2 x float>* %ptr, <vscale x 2 x i1> %mask, i32 zeroext %evl) {
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; CHECK-LABEL: test_store_mask_is_vp_reverse:
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; CHECK: # %bb.0:
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; CHECK-NEXT: slli a2, a1, 2
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; CHECK-NEXT: add a0, a2, a0
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; CHECK-NEXT: addi a0, a0, -4
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; CHECK-NEXT: li a2, -4
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; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
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; CHECK-NEXT: vsse32.v v8, (a0), a2, v0.t
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; CHECK-NEXT: ret
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%storemask = call <vscale x 2 x i1> @llvm.experimental.vp.reverse.nxv2i1(<vscale x 2 x i1> %mask, <vscale x 2 x i1> splat (i1 true), i32 %evl)
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%rev = call <vscale x 2 x float> @llvm.experimental.vp.reverse.nxv2f32(<vscale x 2 x float> %val, <vscale x 2 x i1> splat (i1 true), i32 %evl)
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call void @llvm.vp.store.nxv2f32.p0nxv2f32(<vscale x 2 x float> %rev, <vscale x 2 x float>* %ptr, <vscale x 2 x i1> %storemask, i32 %evl)
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ret void
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}
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define void @test_store_mask_is_vp_reverse_with_mask(<vscale x 2 x float> %val, <vscale x 2 x float>* %ptr, <vscale x 2 x i1> %mask, <vscale x 2 x i1> %revmask, i32 zeroext %evl) {
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; CHECK-LABEL: test_store_mask_is_vp_reverse_with_mask:
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; CHECK: # %bb.0:
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; CHECK-NEXT: slli a2, a1, 2
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; CHECK-NEXT: add a0, a2, a0
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; CHECK-NEXT: addi a0, a0, -4
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; CHECK-NEXT: li a2, -4
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; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
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; CHECK-NEXT: vsse32.v v8, (a0), a2, v0.t
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; CHECK-NEXT: ret
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%storemask = call <vscale x 2 x i1> @llvm.experimental.vp.reverse.nxv2i1(<vscale x 2 x i1> %mask, <vscale x 2 x i1> %revmask, i32 %evl)
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%rev = call <vscale x 2 x float> @llvm.experimental.vp.reverse.nxv2f32(<vscale x 2 x float> %val, <vscale x 2 x i1> splat (i1 true), i32 %evl)
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call void @llvm.vp.store.nxv2f32.p0nxv2f32(<vscale x 2 x float> %rev, <vscale x 2 x float>* %ptr, <vscale x 2 x i1> %storemask, i32 %evl)
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ret void
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}
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define void @test_different_evl(<vscale x 2 x float> %val, <vscale x 2 x float>* %ptr, <vscale x 2 x i1> %mask, i32 zeroext %evl1, i32 zeroext %evl2) {
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; CHECK-LABEL: test_different_evl:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli zero, a1, e16, mf2, ta, ma
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; CHECK-NEXT: vid.v v9
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; CHECK-NEXT: addi a1, a1, -1
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; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma
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; CHECK-NEXT: vmv.v.i v10, 0
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; CHECK-NEXT: vmerge.vim v10, v10, 1, v0
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; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma
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; CHECK-NEXT: vid.v v11
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; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma
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; CHECK-NEXT: vrsub.vx v9, v9, a1
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; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma
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; CHECK-NEXT: vrsub.vx v11, v11, a1
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; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma
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; CHECK-NEXT: vrgatherei16.vv v12, v10, v9
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; CHECK-NEXT: vmsne.vi v0, v12, 0
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; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma
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; CHECK-NEXT: vrgather.vv v9, v8, v11
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; CHECK-NEXT: vsetvli zero, a2, e32, m1, ta, ma
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; CHECK-NEXT: vse32.v v9, (a0), v0.t
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; CHECK-NEXT: ret
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%storemask = call <vscale x 2 x i1> @llvm.experimental.vp.reverse.nxv2i1(<vscale x 2 x i1> %mask, <vscale x 2 x i1> splat (i1 true), i32 %evl1)
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%rev = call <vscale x 2 x float> @llvm.experimental.vp.reverse.nxv2f32(<vscale x 2 x float> %val, <vscale x 2 x i1> splat (i1 true), i32 %evl1)
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call void @llvm.vp.store.nxv2f32.p0nxv2f32(<vscale x 2 x float> %rev, <vscale x 2 x float>* %ptr, <vscale x 2 x i1> %storemask, i32 %evl2)
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ret void
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}
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define void @test_store_splice_reverse_combiner(<vscale x 2 x float> %val, ptr %ptr, i32 zeroext %evl) {
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; CHECK-LABEL: test_store_splice_reverse_combiner:
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; CHECK: # %bb.0:
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; CHECK-NEXT: slli a2, a1, 2
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; CHECK-NEXT: add a0, a2, a0
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; CHECK-NEXT: addi a0, a0, -4
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; CHECK-NEXT: li a2, -4
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; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
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; CHECK-NEXT: vsse32.v v8, (a0), a2
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; CHECK-NEXT: ret
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%rev = call <vscale x 2 x float> @llvm.vector.reverse(<vscale x 2 x float> %val)
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%splice = call <vscale x 2 x float> @llvm.vector.splice.right(<vscale x 2 x float> %rev, <vscale x 2 x float> poison, i32 %evl)
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call void @llvm.vp.store.nxv2f32.p0nxv2f32(<vscale x 2 x float> %splice, ptr %ptr, <vscale x 2 x i1> splat (i1 true), i32 %evl)
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ret void
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}
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define void @test_store_splice_mask_is_reverse(<vscale x 2 x float> %val, ptr %ptr, <vscale x 2 x i1> %mask, i32 zeroext %evl) {
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; CHECK-LABEL: test_store_splice_mask_is_reverse:
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; CHECK: # %bb.0:
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; CHECK-NEXT: slli a2, a1, 2
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; CHECK-NEXT: add a0, a2, a0
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; CHECK-NEXT: addi a0, a0, -4
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; CHECK-NEXT: li a2, -4
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; CHECK-NEXT: vsetvli zero, a1, e32, m1, ta, ma
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; CHECK-NEXT: vsse32.v v8, (a0), a2, v0.t
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; CHECK-NEXT: ret
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%storemask.rev = call <vscale x 2 x i1> @llvm.vector.reverse(<vscale x 2 x i1> %mask)
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%storemask.splice = call <vscale x 2 x i1> @llvm.vector.splice.right(<vscale x 2 x i1> %storemask.rev, <vscale x 2 x i1> poison, i32 %evl)
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%rev = call <vscale x 2 x float> @llvm.vector.reverse(<vscale x 2 x float> %val)
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%splice = call <vscale x 2 x float> @llvm.vector.splice.right(<vscale x 2 x float> %rev, <vscale x 2 x float> poison, i32 %evl)
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call void @llvm.vp.store.nxv2f32.p0nxv2f32(<vscale x 2 x float> %splice, ptr %ptr, <vscale x 2 x i1> %storemask.splice, i32 %evl)
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ret void
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}
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define void @test_store_splice_different_evl(<vscale x 2 x float> %val, ptr %ptr, i32 zeroext %evl1, i32 zeroext %evl2) {
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; CHECK-LABEL: test_store_splice_different_evl:
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; CHECK: # %bb.0:
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; CHECK-NEXT: csrr a3, vlenb
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; CHECK-NEXT: vsetvli a4, zero, e32, m1, ta, ma
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; CHECK-NEXT: vid.v v9
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; CHECK-NEXT: srli a3, a3, 2
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; CHECK-NEXT: addi a4, a3, -1
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; CHECK-NEXT: vrsub.vx v9, v9, a4
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; CHECK-NEXT: vrgather.vv v10, v8, v9
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; CHECK-NEXT: sub a3, a3, a1
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; CHECK-NEXT: vsetvli zero, a2, e32, m1, ta, ma
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; CHECK-NEXT: vslidedown.vx v8, v10, a3
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; CHECK-NEXT: vse32.v v8, (a0)
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; CHECK-NEXT: ret
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%rev = call <vscale x 2 x float> @llvm.vector.reverse(<vscale x 2 x float> %val)
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%splice = call <vscale x 2 x float> @llvm.vector.splice.right(<vscale x 2 x float> %rev, <vscale x 2 x float> poison, i32 %evl1)
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call void @llvm.vp.store.nxv2f32.p0nxv2f32(<vscale x 2 x float> %splice, ptr %ptr, <vscale x 2 x i1> splat (i1 true), i32 %evl2)
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ret void
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}
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