derek.holloway
7502bf64a4
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91 lines
4.8 KiB
LLVM
91 lines
4.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=riscv64 -mattr=+v | FileCheck %s
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define <vscale x 2 x i32> @vwadd_tu(<vscale x 2 x i8> %arg, <vscale x 2 x i32> %arg1, i32 signext %arg2) {
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; CHECK-LABEL: vwadd_tu:
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; CHECK: # %bb.0: # %bb
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; CHECK-NEXT: slli a0, a0, 32
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; CHECK-NEXT: srli a0, a0, 32
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; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
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; CHECK-NEXT: vsext.vf2 v10, v8
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; CHECK-NEXT: vsetvli zero, zero, e16, mf2, tu, ma
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; CHECK-NEXT: vwadd.wv v9, v9, v10
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; CHECK-NEXT: vmv1r.v v8, v9
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; CHECK-NEXT: ret
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bb:
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%tmp = call <vscale x 2 x i32> @llvm.vp.sext.nxv2i32.nxv2i8(<vscale x 2 x i8> %arg, <vscale x 2 x i1> splat (i1 true), i32 %arg2)
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%tmp3 = call <vscale x 2 x i32> @llvm.vp.add.nxv2i32(<vscale x 2 x i32> %arg1, <vscale x 2 x i32> %tmp, <vscale x 2 x i1> splat (i1 true), i32 %arg2)
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%tmp4 = call <vscale x 2 x i32> @llvm.vp.merge.nxv2i32(<vscale x 2 x i1> splat (i1 true), <vscale x 2 x i32> %tmp3, <vscale x 2 x i32> %arg1, i32 %arg2)
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ret <vscale x 2 x i32> %tmp4
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}
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define <vscale x 2 x i32> @vwaddu_tu(<vscale x 2 x i8> %arg, <vscale x 2 x i32> %arg1, i32 signext %arg2) {
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; CHECK-LABEL: vwaddu_tu:
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; CHECK: # %bb.0: # %bb
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; CHECK-NEXT: slli a0, a0, 32
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; CHECK-NEXT: srli a0, a0, 32
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; CHECK-NEXT: vsetvli zero, a0, e16, mf2, ta, ma
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; CHECK-NEXT: vzext.vf2 v10, v8
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; CHECK-NEXT: vsetvli zero, zero, e16, mf2, tu, ma
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; CHECK-NEXT: vwaddu.wv v9, v9, v10
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; CHECK-NEXT: vmv1r.v v8, v9
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; CHECK-NEXT: ret
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bb:
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%tmp = call <vscale x 2 x i32> @llvm.vp.zext.nxv2i32.nxv2i8(<vscale x 2 x i8> %arg, <vscale x 2 x i1> splat (i1 true), i32 %arg2)
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%tmp3 = call <vscale x 2 x i32> @llvm.vp.add.nxv2i32(<vscale x 2 x i32> %arg1, <vscale x 2 x i32> %tmp, <vscale x 2 x i1> splat (i1 true), i32 %arg2)
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%tmp4 = call <vscale x 2 x i32> @llvm.vp.merge.nxv2i32(<vscale x 2 x i1> splat (i1 true), <vscale x 2 x i32> %tmp3, <vscale x 2 x i32> %arg1, i32 %arg2)
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ret <vscale x 2 x i32> %tmp4
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}
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define <vscale x 2 x i32> @vwadd_vv_vpnxv2i32_vpnxv2i16_vpnxv2i16(<vscale x 2 x i16> %x, <vscale x 2 x i16> %y, <vscale x 2 x i1> %m, i32 signext %evl) {
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; CHECK-LABEL: vwadd_vv_vpnxv2i32_vpnxv2i16_vpnxv2i16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
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; CHECK-NEXT: vwadd.vv v10, v8, v9
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; CHECK-NEXT: vmv1r.v v8, v10
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; CHECK-NEXT: ret
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%x.sext = call <vscale x 2 x i32> @llvm.vp.sext.nxv2i32.nxv2i16(<vscale x 2 x i16> %x, <vscale x 2 x i1> %m, i32 %evl)
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%y.sext = call <vscale x 2 x i32> @llvm.vp.sext.nxv2i32.nxv2i16(<vscale x 2 x i16> %y, <vscale x 2 x i1> %m, i32 %evl)
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%add = call <vscale x 2 x i32> @llvm.vp.add.nxv2i32(<vscale x 2 x i32> %x.sext, <vscale x 2 x i32> %y.sext, <vscale x 2 x i1> %m, i32 %evl)
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ret <vscale x 2 x i32> %add
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}
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define <vscale x 2 x i32> @vwadd_vv_vpnxv2i32_vpnxv2i16_nxv2i16(<vscale x 2 x i16> %x, <vscale x 2 x i16> %y, <vscale x 2 x i1> %m, i32 signext %evl) {
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; CHECK-LABEL: vwadd_vv_vpnxv2i32_vpnxv2i16_nxv2i16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
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; CHECK-NEXT: vwadd.vv v10, v8, v9
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; CHECK-NEXT: vmv1r.v v8, v10
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; CHECK-NEXT: ret
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%x.sext = call <vscale x 2 x i32> @llvm.vp.sext.nxv2i32.nxv2i16(<vscale x 2 x i16> %x, <vscale x 2 x i1> %m, i32 %evl)
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%y.sext = sext <vscale x 2 x i16> %y to <vscale x 2 x i32>
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%add = call <vscale x 2 x i32> @llvm.vp.add.nxv2i32(<vscale x 2 x i32> %x.sext, <vscale x 2 x i32> %y.sext, <vscale x 2 x i1> %m, i32 %evl)
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ret <vscale x 2 x i32> %add
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}
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define <vscale x 2 x i32> @vwadd_vv_vpnxv2i32_nxv2i16_nxv2i16(<vscale x 2 x i16> %x, <vscale x 2 x i16> %y, <vscale x 2 x i1> %m, i32 signext %evl) {
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; CHECK-LABEL: vwadd_vv_vpnxv2i32_nxv2i16_nxv2i16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
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; CHECK-NEXT: vwadd.vv v10, v8, v9
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; CHECK-NEXT: vmv1r.v v8, v10
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; CHECK-NEXT: ret
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%x.sext = sext <vscale x 2 x i16> %x to <vscale x 2 x i32>
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%y.sext = sext <vscale x 2 x i16> %y to <vscale x 2 x i32>
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%add = call <vscale x 2 x i32> @llvm.vp.add.nxv2i32(<vscale x 2 x i32> %x.sext, <vscale x 2 x i32> %y.sext, <vscale x 2 x i1> %m, i32 %evl)
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ret <vscale x 2 x i32> %add
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}
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define <vscale x 2 x i32> @vwadd_vv_nxv2i32_vpnxv2i16_vpnxv2i16(<vscale x 2 x i16> %x, <vscale x 2 x i16> %y, <vscale x 2 x i1> %m, i32 signext %evl) {
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; CHECK-LABEL: vwadd_vv_nxv2i32_vpnxv2i16_vpnxv2i16:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e16, mf2, ta, ma
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; CHECK-NEXT: vwadd.vv v10, v8, v9
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; CHECK-NEXT: vmv1r.v v8, v10
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; CHECK-NEXT: ret
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%x.sext = call <vscale x 2 x i32> @llvm.vp.sext.nxv2i32.nxv2i16(<vscale x 2 x i16> %x, <vscale x 2 x i1> %m, i32 %evl)
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%y.sext = call <vscale x 2 x i32> @llvm.vp.sext.nxv2i32.nxv2i16(<vscale x 2 x i16> %y, <vscale x 2 x i1> %m, i32 %evl)
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%add = add <vscale x 2 x i32> %x.sext, %y.sext
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ret <vscale x 2 x i32> %add
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}
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