derek.holloway
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40 lines
1.3 KiB
YAML
40 lines
1.3 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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# RUN: llc %s -mtriple=riscv64 -run-pass=machine-sink -o - | FileCheck %s
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---
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name: main
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tracksRegLiveness: true
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registers:
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- { id: 0, class: fpr32 }
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- { id: 1, class: fpr32 }
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- { id: 2, class: gpr }
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- { id: 3, class: gpr }
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liveins:
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- { reg: '$f10_f', virtual-reg: '%0' }
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- { reg: '$f11_f', virtual-reg: '%1' }
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body: |
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bb.0.entry:
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liveins: $f10_f, $f11_f
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; CHECK-LABEL: name: main
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; CHECK: liveins: $f10_f, $f11_f
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr32 = COPY $f11_f
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr32 = COPY $f10_f
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; CHECK-NEXT: [[ReadFFLAGS:%[0-9]+]]:gpr = ReadFFLAGS implicit $fflags
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; CHECK-NEXT: [[FLE_S:%[0-9]+]]:gpr = nofpexcept FLE_S [[COPY1]], [[COPY]]
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; CHECK-NEXT: WriteFFLAGS killed [[ReadFFLAGS]], implicit-def $fflags
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; CHECK-NEXT: $x0 = nofpexcept FEQ_S [[COPY1]], [[COPY]]
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; CHECK-NEXT: $x10 = COPY [[FLE_S]]
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; CHECK-NEXT: PseudoRET implicit $x10
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%1:fpr32 = COPY $f11_f
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%0:fpr32 = COPY $f10_f
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%3:gpr = ReadFFLAGS implicit $fflags
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%2:gpr = nofpexcept FLE_S %0, %1
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WriteFFLAGS killed %3, implicit-def $fflags
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$x0 = nofpexcept FEQ_S %0, %1
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$x10 = COPY %2
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PseudoRET implicit $x10
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...
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