derek.holloway
7502bf64a4
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42 lines
1.6 KiB
LLVM
42 lines
1.6 KiB
LLVM
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv-vulkan-unknown %s -o - | FileCheck %s
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-vulkan-unknown %s -o - -filetype=obj | spirv-val %}
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; Test lowering to spir-v backend for various types and scalar/vector
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; CHECK-DAG: %[[#f16:]] = OpTypeFloat 16
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; CHECK-DAG: %[[#f32:]] = OpTypeFloat 32
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; CHECK-DAG: %[[#uint:]] = OpTypeInt 32 0
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; CHECK-DAG: %[[#v4_half:]] = OpTypeVector %[[#f16]] 4
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; CHECK-DAG: %[[#scope:]] = OpConstant %[[#uint]] 3
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; CHECK-LABEL: Begin function test_float
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; CHECK: %[[#fexpr:]] = OpFunctionParameter %[[#f32]]
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define float @test_float(float %fexpr) {
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entry:
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; CHECK: %[[#fret:]] = OpGroupNonUniformFAdd %[[#f32]] %[[#scope]] Reduce %[[#fexpr]]
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%0 = call float @llvm.spv.wave.reduce.sum.f32(float %fexpr)
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ret float %0
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}
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; CHECK-LABEL: Begin function test_int
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; CHECK: %[[#iexpr:]] = OpFunctionParameter %[[#uint]]
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define i32 @test_int(i32 %iexpr) {
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entry:
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; CHECK: %[[#iret:]] = OpGroupNonUniformIAdd %[[#uint]] %[[#scope]] Reduce %[[#iexpr]]
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%0 = call i32 @llvm.spv.wave.reduce.sum.i32(i32 %iexpr)
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ret i32 %0
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}
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; CHECK-LABEL: Begin function test_vhalf
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; CHECK: %[[#vbexpr:]] = OpFunctionParameter %[[#v4_half]]
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define <4 x half> @test_vhalf(<4 x half> %vbexpr) {
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entry:
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; CHECK: %[[#vhalfret:]] = OpGroupNonUniformFAdd %[[#v4_half]] %[[#scope]] Reduce %[[#vbexpr]]
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%0 = call <4 x half> @llvm.spv.wave.reduce.sum.v4half(<4 x half> %vbexpr)
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ret <4 x half> %0
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}
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declare float @llvm.spv.wave.reduce.sum.f32(float)
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declare i32 @llvm.spv.wave.reduce.sum.i32(i32)
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declare <4 x half> @llvm.spv.wave.reduce.sum.v4half(<4 x half>)
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