derek.holloway
7502bf64a4
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64 lines
2.6 KiB
LLVM
64 lines
2.6 KiB
LLVM
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown %s -o - -filetype=obj | spirv-val %}
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; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
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; CHECK: OpExtInstImport "OpenCL.std"
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; CHECK-DAG: OpName %[[#Foo:]] "foo"
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; CHECK-DAG: OpName %[[#Bar:]] "bar"
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; CHECK: %[[#Foo]] = OpFunction
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; CHECK: %[[#]] = OpExtInst %[[#]] %[[#]] u_add_sat
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; CHECK: %[[#]] = OpExtInst %[[#]] %[[#]] u_sub_sat
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; CHECK: %[[#]] = OpExtInst %[[#]] %[[#]] s_add_sat
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; CHECK: %[[#]] = OpExtInst %[[#]] %[[#]] s_sub_sat
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; CHECK: %[[#Bar]] = OpFunction
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; CHECK: %[[#]] = OpExtInst %[[#]] %[[#]] u_add_sat
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; CHECK: %[[#]] = OpExtInst %[[#]] %[[#]] u_sub_sat
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; CHECK: %[[#]] = OpExtInst %[[#]] %[[#]] s_add_sat
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; CHECK: %[[#]] = OpExtInst %[[#]] %[[#]] s_sub_sat
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@G_r1_foo = global i16 0
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@G_r2_foo = global i16 0
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@G_r3_foo = global i16 0
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@G_r4_foo = global i16 0
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@G_r1_bar = global <4 x i32> zeroinitializer
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@G_r2_bar = global <4 x i32> zeroinitializer
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@G_r3_bar = global <4 x i32> zeroinitializer
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@G_r4_bar = global <4 x i32> zeroinitializer
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define spir_func void @foo(i16 %x, i16 %y) {
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entry:
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%r1 = tail call i16 @llvm.uadd.sat.i16(i16 %x, i16 %y)
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store i16 %r1, ptr @G_r1_foo
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%r2 = tail call i16 @llvm.usub.sat.i16(i16 %x, i16 %y)
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store i16 %r2, ptr @G_r2_foo
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%r3 = tail call i16 @llvm.sadd.sat.i16(i16 %x, i16 %y)
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store i16 %r3, ptr @G_r3_foo
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%r4 = tail call i16 @llvm.ssub.sat.i16(i16 %x, i16 %y)
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store i16 %r4, ptr @G_r4_foo
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ret void
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}
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define spir_func void @bar(<4 x i32> %x, <4 x i32> %y) {
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entry:
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%r1 = tail call <4 x i32> @llvm.uadd.sat.v4i32(<4 x i32> %x, <4 x i32> %y)
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store <4 x i32> %r1, ptr @G_r1_bar
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%r2 = tail call <4 x i32> @llvm.usub.sat.v4i32(<4 x i32> %x, <4 x i32> %y)
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store <4 x i32> %r2, ptr @G_r2_bar
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%r3 = tail call <4 x i32> @llvm.sadd.sat.v4i32(<4 x i32> %x, <4 x i32> %y)
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store <4 x i32> %r3, ptr @G_r3_bar
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%r4 = tail call <4 x i32> @llvm.ssub.sat.v4i32(<4 x i32> %x, <4 x i32> %y)
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store <4 x i32> %r4, ptr @G_r4_bar
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ret void
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}
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declare i16 @llvm.uadd.sat.i16(i16, i16)
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declare i16 @llvm.usub.sat.i16(i16, i16)
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declare i16 @llvm.sadd.sat.i16(i16, i16)
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declare i16 @llvm.ssub.sat.i16(i16, i16)
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declare <4 x i32> @llvm.uadd.sat.v4i32(<4 x i32>, <4 x i32>)
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declare <4 x i32> @llvm.usub.sat.v4i32(<4 x i32>, <4 x i32>)
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declare <4 x i32> @llvm.sadd.sat.v4i32(<4 x i32>, <4 x i32>)
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declare <4 x i32> @llvm.ssub.sat.v4i32(<4 x i32>, <4 x i32>)
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