derek.holloway
7502bf64a4
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105 lines
4.8 KiB
LLVM
105 lines
4.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve -verify-machineinstrs -tail-predication=enabled -o - %s | FileCheck %s
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define arm_aapcs_vfpcc void @usub_sat(ptr noalias nocapture readonly %pSrcA, ptr noalias nocapture readonly %pSrcB, ptr noalias nocapture %pDst, i32 %blockSize) {
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; CHECK-LABEL: usub_sat:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: .save {r7, lr}
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; CHECK-NEXT: push {r7, lr}
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; CHECK-NEXT: cmp r3, #0
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; CHECK-NEXT: it eq
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; CHECK-NEXT: popeq {r7, pc}
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; CHECK-NEXT: .LBB0_1: @ %vector.ph
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; CHECK-NEXT: dlstp.16 lr, r3
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; CHECK-NEXT: .LBB0_2: @ %vector.body
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; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: vldrh.u16 q0, [r1], #16
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; CHECK-NEXT: vldrh.u16 q1, [r0], #16
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; CHECK-NEXT: vqsub.u16 q0, q1, q0
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; CHECK-NEXT: vstrh.16 q0, [r2], #16
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; CHECK-NEXT: letp lr, .LBB0_2
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; CHECK-NEXT: @ %bb.3: @ %while.end
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; CHECK-NEXT: pop {r7, pc}
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entry:
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%cmp7 = icmp eq i32 %blockSize, 0
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br i1 %cmp7, label %while.end, label %vector.ph
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vector.ph: ; preds = %entry
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%n.rnd.up = add i32 %blockSize, 7
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%n.vec = and i32 %n.rnd.up, -8
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br label %vector.body
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vector.body: ; preds = %vector.body, %vector.ph
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%index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
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%next.gep = getelementptr i16, ptr %pSrcA, i32 %index
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%next.gep20 = getelementptr i16, ptr %pDst, i32 %index
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%next.gep21 = getelementptr i16, ptr %pSrcB, i32 %index
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%active.lane.mask = call <8 x i1> @llvm.get.active.lane.mask.v8i1.i32(i32 %index, i32 %blockSize)
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%wide.masked.load = call <8 x i16> @llvm.masked.load.v8i16.p0(ptr %next.gep, i32 2, <8 x i1> %active.lane.mask, <8 x i16> undef)
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%wide.masked.load24 = call <8 x i16> @llvm.masked.load.v8i16.p0(ptr %next.gep21, i32 2, <8 x i1> %active.lane.mask, <8 x i16> undef)
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%0 = call <8 x i16> @llvm.usub.sat.v8i16(<8 x i16> %wide.masked.load, <8 x i16> %wide.masked.load24)
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call void @llvm.masked.store.v8i16.p0(<8 x i16> %0, ptr %next.gep20, i32 2, <8 x i1> %active.lane.mask)
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%index.next = add i32 %index, 8
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%1 = icmp eq i32 %index.next, %n.vec
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br i1 %1, label %while.end, label %vector.body
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while.end: ; preds = %vector.body, %entry
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ret void
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}
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define arm_aapcs_vfpcc void @ssub_sat(ptr noalias nocapture readonly %pSrcA, ptr noalias nocapture readonly %pSrcB, ptr noalias nocapture %pDst, i32 %blockSize) {
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; CHECK-LABEL: ssub_sat:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: .save {r7, lr}
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; CHECK-NEXT: push {r7, lr}
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; CHECK-NEXT: cmp r3, #0
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; CHECK-NEXT: it eq
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; CHECK-NEXT: popeq {r7, pc}
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; CHECK-NEXT: .LBB1_1: @ %vector.ph
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; CHECK-NEXT: dlstp.16 lr, r3
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; CHECK-NEXT: .LBB1_2: @ %vector.body
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; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: vldrh.u16 q0, [r1], #16
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; CHECK-NEXT: vldrh.u16 q1, [r0], #16
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; CHECK-NEXT: vqsub.s16 q0, q1, q0
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; CHECK-NEXT: vstrh.16 q0, [r2], #16
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; CHECK-NEXT: letp lr, .LBB1_2
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; CHECK-NEXT: @ %bb.3: @ %while.end
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; CHECK-NEXT: pop {r7, pc}
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entry:
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%cmp7 = icmp eq i32 %blockSize, 0
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br i1 %cmp7, label %while.end, label %vector.ph
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vector.ph: ; preds = %entry
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%n.rnd.up = add i32 %blockSize, 7
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%n.vec = and i32 %n.rnd.up, -8
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br label %vector.body
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vector.body: ; preds = %vector.body, %vector.ph
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%index = phi i32 [ 0, %vector.ph ], [ %index.next, %vector.body ]
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%next.gep = getelementptr i16, ptr %pSrcA, i32 %index
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%next.gep20 = getelementptr i16, ptr %pDst, i32 %index
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%next.gep21 = getelementptr i16, ptr %pSrcB, i32 %index
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%active.lane.mask = call <8 x i1> @llvm.get.active.lane.mask.v8i1.i32(i32 %index, i32 %blockSize)
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%wide.masked.load = call <8 x i16> @llvm.masked.load.v8i16.p0(ptr %next.gep, i32 2, <8 x i1> %active.lane.mask, <8 x i16> undef)
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%wide.masked.load24 = call <8 x i16> @llvm.masked.load.v8i16.p0(ptr %next.gep21, i32 2, <8 x i1> %active.lane.mask, <8 x i16> undef)
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%0 = call <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16> %wide.masked.load, <8 x i16> %wide.masked.load24)
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call void @llvm.masked.store.v8i16.p0(<8 x i16> %0, ptr %next.gep20, i32 2, <8 x i1> %active.lane.mask)
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%index.next = add i32 %index, 8
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%1 = icmp eq i32 %index.next, %n.vec
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br i1 %1, label %while.end, label %vector.body
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while.end: ; preds = %vector.body, %entry
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ret void
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}
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declare <8 x i1> @llvm.get.active.lane.mask.v8i1.i32(i32, i32)
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declare <8 x i16> @llvm.masked.load.v8i16.p0(ptr, i32 immarg, <8 x i1>, <8 x i16>)
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declare <8 x i16> @llvm.ssub.sat.v8i16(<8 x i16>, <8 x i16>)
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declare <8 x i16> @llvm.usub.sat.v8i16(<8 x i16>, <8 x i16>)
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declare void @llvm.masked.store.v8i16.p0(<8 x i16>, ptr, i32 immarg, <8 x i1>)
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