derek.holloway
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79 lines
2.9 KiB
YAML
79 lines
2.9 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -o - %s -run-pass=if-converter -simplify-mir | FileCheck %s
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--- |
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; ModuleID = 'ifcvt-dead-predicate.ll'
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source_filename = "ifcvt-dead-predicate.ll"
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target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
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target triple = "thumbv7-unknown-linux-android16"
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; Function Attrs: minsize nounwind optsize ssp uwtable
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define hidden zeroext i1 @branch_entry(ptr %command_set, ptr %requested_filename, ptr %filename_to_use) local_unnamed_addr #0 {
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entry:
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%0 = load i32, ptr %command_set, align 4
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%and.i.i = and i32 %0, 128
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%tobool.i.i.not = icmp eq i32 %and.i.i, 0
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br i1 %tobool.i.i.not, label %land.end, label %land.rhs
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land.rhs: ; preds = %entry
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%call1 = tail call zeroext i1 @branch_target(ptr %requested_filename, ptr %filename_to_use)
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ret i1 %call1
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land.end: ; preds = %entry
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ret i1 false
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}
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; Function Attrs: minsize optsize
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declare zeroext i1 @branch_target(ptr, ptr) local_unnamed_addr #1
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attributes #0 = { minsize nounwind optsize ssp uwtable }
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attributes #1 = { minsize optsize }
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...
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---
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name: branch_entry
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alignment: 2
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tracksRegLiveness: true
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liveins:
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- { reg: '$r0' }
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- { reg: '$r1' }
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- { reg: '$r2' }
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frameInfo:
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maxAlignment: 1
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maxCallFrameSize: 0
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machineFunctionInfo: {}
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body: |
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; CHECK-LABEL: name: branch_entry
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; CHECK: bb.0.entry:
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; CHECK: successors: %bb.1
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; CHECK: liveins: $r0, $r1, $r2
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; CHECK: renamable $r0 = tLDRBi killed renamable $r0, 0, 14 /* CC::al */, $noreg :: (load (s8) from %ir.command_set, align 4)
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; CHECK: dead renamable $r0, $cpsr = tLSLri killed renamable $r0, 24, 14 /* CC::al */, $noreg
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; CHECK: $r0, dead $noreg = tMOVi8 0, 5 /* CC::pl */, $cpsr
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; CHECK: tBX_RET 5 /* CC::pl */, killed $cpsr, implicit killed $r0
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; CHECK: bb.1.land.rhs:
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; CHECK: liveins: $r1, $r2
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; CHECK: $r0 = tMOVr killed $r1, 14 /* CC::al */, $noreg
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; CHECK: $r1 = tMOVr killed $r2, 14 /* CC::al */, $noreg
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; CHECK: tTAILJMPdND @branch_target, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp, implicit $r0, implicit $r1
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bb.0.entry:
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successors: %bb.1, %bb.2
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liveins: $r0, $r1, $r2
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renamable $r0 = tLDRBi killed renamable $r0, 0, 14 /* CC::al */, $noreg :: (load (s8) from %ir.command_set, align 4)
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dead renamable $r0, $cpsr = tLSLri killed renamable $r0, 24, 14 /* CC::al */, $noreg
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t2Bcc %bb.2, 4 /* CC::mi */, killed $cpsr
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bb.1.land.end:
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$r0, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
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tBX_RET 14 /* CC::al */, $noreg, implicit $r0
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bb.2.land.rhs:
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liveins: $r1, $r2
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$r0 = tMOVr killed $r1, 14 /* CC::al */, $noreg
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$r1 = tMOVr killed $r2, 14 /* CC::al */, $noreg
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tTAILJMPdND @branch_target, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp, implicit $r0, implicit $r1
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...
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