derek.holloway
7502bf64a4
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59 lines
2.9 KiB
LLVM
59 lines
2.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+amx-int8 -mattr=+avx512f -verify-machineinstrs | FileCheck %s
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define dso_local void @test_chain(ptr %A_mem, ptr %B_mem, ptr %C_mem) {
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; CHECK-LABEL: test_chain:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
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; CHECK-NEXT: vmovups %zmm0, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movb $1, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movb $16, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movw $64, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movb $16, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movw $64, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movb $16, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movw $64, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movb $16, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movw $64, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movb $16, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movw $64, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: ldtilecfg -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movl $64, %eax
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; CHECK-NEXT: movw $64, %cx
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; CHECK-NEXT: movw $16, %r8w
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; CHECK-NEXT: tileloadd (%rdi,%rax), %tmm0
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; CHECK-NEXT: addq $1024, %rdi # imm = 0x400
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; CHECK-NEXT: tileloadd (%rdi,%rax), %tmm1
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; CHECK-NEXT: tileloadd (%rdx,%rax), %tmm3
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; CHECK-NEXT: leaq 1024(%rdx), %rdi
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; CHECK-NEXT: tileloadd (%rdi,%rax), %tmm2
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; CHECK-NEXT: tileloadd (%rsi,%rax), %tmm4
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; CHECK-NEXT: tdpbssd %tmm4, %tmm0, %tmm3
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; CHECK-NEXT: tilestored %tmm3, (%rdx,%rax)
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; CHECK-NEXT: tdpbssd %tmm4, %tmm1, %tmm2
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; CHECK-NEXT: tilestored %tmm2, (%rdi,%rax)
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; CHECK-NEXT: tilerelease
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; CHECK-NEXT: vzeroupper
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; CHECK-NEXT: retq
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entry:
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%a1 = call x86_amx @llvm.x86.tileloadd64.internal(i16 16, i16 64, ptr nonnull %A_mem, i64 64)
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%addr = getelementptr inbounds i8, ptr %A_mem, i64 1024
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%a2 = call x86_amx @llvm.x86.tileloadd64.internal(i16 16, i16 64, ptr nonnull %addr, i64 64)
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%c1 = call x86_amx @llvm.x86.tileloadd64.internal(i16 16, i16 64, ptr nonnull %C_mem, i64 64)
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%caddr = getelementptr inbounds i8, ptr %C_mem, i64 1024
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%c2 = call x86_amx @llvm.x86.tileloadd64.internal(i16 16, i16 64, ptr nonnull %caddr, i64 64)
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br label %dotpd
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dotpd:
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%b = call x86_amx @llvm.x86.tileloadd64.internal(i16 16, i16 64, ptr nonnull %B_mem, i64 64)
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%dp1 = call x86_amx @llvm.x86.tdpbssd.internal(i16 16, i16 64, i16 64, x86_amx %c1, x86_amx %a1, x86_amx %b)
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call void @llvm.x86.tilestored64.internal(i16 16, i16 64, ptr nonnull %C_mem, i64 64, x86_amx %dp1)
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%dp2 = call x86_amx @llvm.x86.tdpbssd.internal(i16 16, i16 64, i16 64, x86_amx %c2, x86_amx %a2, x86_amx %b)
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call void @llvm.x86.tilestored64.internal(i16 16, i16 64, ptr nonnull %caddr, i64 64, x86_amx %dp2)
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ret void
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}
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declare x86_amx @llvm.x86.tileloadd64.internal(i16, i16, ptr, i64)
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declare x86_amx @llvm.x86.tdpbssd.internal(i16, i16, i16, x86_amx, x86_amx, x86_amx)
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declare void @llvm.x86.tilestored64.internal(i16, i16, ptr, i64, x86_amx)
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