derek.holloway
7502bf64a4
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154 lines
9.8 KiB
YAML
154 lines
9.8 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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# RUN: llc -mtriple=x86_64-- -mattr=+amx-int8,avx512f -run-pass="x86-fast-pre-tile-config,regallocfast,x86-fast-tile-config" -verify-machineinstrs -o - %s | FileCheck %s
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# RUN: llc -mtriple=x86_64-- -mattr=+amx-int8,avx512f -passes="x86-fast-pre-tile-config,regallocfast,x86-fast-tile-config" -o - %s | FileCheck %s
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# Test to verify that ldtilecfg instructions are sinked closer to tile defining
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# instructions after a call. This ensures call does not overwrite values in
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# registers being used for configuring the AMX tile.
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...
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---
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name: test_api
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alignment: 16
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tracksRegLiveness: true
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registers:
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- { id: 0, class: gr64, preferred-register: '', flags: [ ] }
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- { id: 1, class: gr64, preferred-register: '', flags: [ ] }
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- { id: 2, class: gr64, preferred-register: '', flags: [ ] }
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- { id: 3, class: gr64, preferred-register: '', flags: [ ] }
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- { id: 4, class: tile, preferred-register: '', flags: [ ] }
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- { id: 5, class: gr64_nosp, preferred-register: '', flags: [ ] }
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- { id: 6, class: gr64, preferred-register: '', flags: [ ] }
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- { id: 9, class: gr64_nosp, preferred-register: '', flags: [ ] }
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- { id: 10, class: gr64, preferred-register: '', flags: [ ] }
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- { id: 13, class: tile, preferred-register: '', flags: [ ] }
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- { id: 14, class: gr64_nosp, preferred-register: '', flags: [ ] }
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- { id: 15, class: gr64, preferred-register: '', flags: [ ] }
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- { id: 18, class: gr64, preferred-register: '', flags: [ ] }
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- { id: 19, class: gr64_nosp, preferred-register: '', flags: [ ] }
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- { id: 22, class: gr64, preferred-register: '', flags: [ ] }
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- { id: 23, class: gr64, preferred-register: '', flags: [ ] }
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- { id: 24, class: gr64, preferred-register: '', flags: [ ] }
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- { id: 25, class: tile, preferred-register: '', flags: [ ] }
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- { id: 26, class: gr64_nosp, preferred-register: '', flags: [ ] }
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- { id: 29, class: gr64_nosp, preferred-register: '', flags: [ ] }
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- { id: 30, class: gr64, preferred-register: '', flags: [ ] }
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- { id: 33, class: tile, preferred-register: '', flags: [ ] }
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- { id: 34, class: gr64_nosp, preferred-register: '', flags: [ ] }
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- { id: 35, class: gr64, preferred-register: '', flags: [ ] }
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- { id: 38, class: gr64_nosp, preferred-register: '', flags: [ ] }
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- { id: 39, class: gr64, preferred-register: '', flags: [ ] }
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- { id: 40, class: gr16, preferred-register: '', flags: [ ] }
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- { id: 41, class: gr16, preferred-register: '', flags: [ ] }
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liveins:
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- { reg: '$rdi', virtual-reg: '%0' }
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- { reg: '$rsi', virtual-reg: '%2' }
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frameInfo:
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adjustsStack: true
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maxAlignment: 1024
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stack:
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- { id: 0, size: 1024, alignment: 1024 }
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- { id: 1, size: 1024, alignment: 1024 }
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- { id: 2, size: 32, alignment: 32 }
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- { id: 3, size: 32, alignment: 32 }
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- { id: 4, size: 8, alignment: 8 }
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machineFunctionInfo:
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amxProgModel: ManagedRA
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body: |
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bb.0.entry:
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liveins: $rdi, $rsi
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; CHECK-LABEL: name: test_api
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; CHECK: liveins: $rdi, $rsi
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: renamable $zmm0 = AVX512_512_SET0
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; CHECK-NEXT: VMOVUPSZmr %stack.5, 1, $noreg, 0, $noreg, killed renamable $zmm0 :: (store (s512) into %stack.5, align 4)
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; CHECK-NEXT: MOV8mi %stack.5, 1, $noreg, 0, $noreg, 1 :: (store (s512) into %stack.5, align 4)
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; CHECK-NEXT: MOV64mr %stack.8, 1, $noreg, 0, $noreg, $rsi :: (store (s64) into %stack.8)
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; CHECK-NEXT: renamable $rsi = MOV32ri64 16
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; CHECK-NEXT: renamable $rdx = LEA64r %stack.2, 1, $noreg, 0, $noreg
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; CHECK-NEXT: renamable $cx = MOV16ri 16
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; CHECK-NEXT: MOV16mr %stack.7, 1, $noreg, 0, $noreg, $cx :: (store (s16) into %stack.7)
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; CHECK-NEXT: renamable $ax = MOV16ri 2
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; CHECK-NEXT: MOV16mr %stack.6, 1, $noreg, 0, $noreg, $ax :: (store (s16) into %stack.6)
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; CHECK-NEXT: $al = IMPLICIT_DEF
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; CHECK-NEXT: MOV8mr %stack.5, 1, $noreg, 48, $noreg, $al :: (store (s512) into %stack.5 + 48, align 4)
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; CHECK-NEXT: MOV16mr %stack.5, 1, $noreg, 16, $noreg, $cx :: (store (s512) into %stack.5 + 16, align 4)
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; CHECK-NEXT: $al = IMPLICIT_DEF
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; CHECK-NEXT: MOV8mr %stack.5, 1, $noreg, 48, $noreg, $al :: (store (s512) into %stack.5 + 48, align 4)
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; CHECK-NEXT: MOV16mr %stack.5, 1, $noreg, 16, $noreg, $cx :: (store (s512) into %stack.5 + 16, align 4)
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; CHECK-NEXT: PLDTILECFGV %stack.5, 1, $noreg, 0, $noreg, implicit-def dead $tmm0, implicit-def dead $tmm1, implicit-def dead $tmm2, implicit-def dead $tmm3, implicit-def dead $tmm4, implicit-def dead $tmm5, implicit-def dead $tmm6, implicit-def dead $tmm7 :: (load (s512) from %stack.5, align 4)
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; CHECK-NEXT: renamable $tmm0 = PTILELOADDV renamable $ax, renamable $cx, killed renamable $rdx, 1, killed renamable $rsi, 0, $noreg
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; CHECK-NEXT: renamable $rsi = MOV32ri64 64
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; CHECK-NEXT: renamable $rdx = LEA64r %stack.1, 1, $noreg, 0, $noreg
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; CHECK-NEXT: PTILESTOREDV renamable $ax, renamable $cx, killed renamable $rdx, 1, killed renamable $rsi, 0, $noreg, killed renamable $tmm0
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; CHECK-NEXT: renamable $rsi = MOV32ri64 64
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; CHECK-NEXT: renamable $rdx = LEA64r %stack.1, 1, $noreg, 0, $noreg
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; CHECK-NEXT: renamable $tmm0 = PTILELOADDV renamable $ax, renamable $cx, killed renamable $rdx, 1, killed renamable $rsi, 0, $noreg
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; CHECK-NEXT: renamable $rdx = MOV32ri64 16
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; CHECK-NEXT: PTILESTOREDV renamable $ax, renamable $cx, killed renamable $rdi, 1, killed renamable $rdx, 0, $noreg, killed renamable $tmm0
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; CHECK-NEXT: ADJCALLSTACKDOWN64 0, 0, 0, implicit-def $rsp, implicit-def dead $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp
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; CHECK-NEXT: CALL64pcrel32 &foo, csr_64, implicit $rsp, implicit $ssp, implicit-def $rax
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; CHECK-NEXT: $rsi = MOV64rm %stack.8, 1, $noreg, 0, $noreg :: (load (s64) from %stack.8)
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; CHECK-NEXT: $cx = MOV16rm %stack.7, 1, $noreg, 0, $noreg :: (load (s16) from %stack.7)
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; CHECK-NEXT: ADJCALLSTACKUP64 0, 0, implicit-def $rsp, implicit-def dead $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp
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; CHECK-NEXT: renamable $rdx = COPY $rax
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; CHECK-NEXT: $ax = MOV16rm %stack.6, 1, $noreg, 0, $noreg :: (load (s16) from %stack.6)
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; CHECK-NEXT: MOV64mr killed renamable $rsi, 1, $noreg, 0, $noreg, killed renamable $rdx
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; CHECK-NEXT: renamable $rdx = MOV64rm %stack.4, 1, $noreg, 0, $noreg
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; CHECK-NEXT: renamable $rsi = MOV32ri64 16
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; CHECK-NEXT: $al = IMPLICIT_DEF
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; CHECK-NEXT: MOV8mr %stack.5, 1, $noreg, 48, $noreg, $al :: (store (s512) into %stack.5 + 48, align 4)
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; CHECK-NEXT: MOV16mr %stack.5, 1, $noreg, 16, $noreg, $cx :: (store (s512) into %stack.5 + 16, align 4)
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; CHECK-NEXT: $al = IMPLICIT_DEF
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; CHECK-NEXT: MOV8mr %stack.5, 1, $noreg, 48, $noreg, $al :: (store (s512) into %stack.5 + 48, align 4)
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; CHECK-NEXT: MOV16mr %stack.5, 1, $noreg, 16, $noreg, $cx :: (store (s512) into %stack.5 + 16, align 4)
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; CHECK-NEXT: PLDTILECFGV %stack.5, 1, $noreg, 0, $noreg, implicit-def dead $tmm0, implicit-def dead $tmm1, implicit-def dead $tmm2, implicit-def dead $tmm3, implicit-def dead $tmm4, implicit-def dead $tmm5, implicit-def dead $tmm6, implicit-def dead $tmm7 :: (load (s512) from %stack.5, align 4)
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; CHECK-NEXT: renamable $tmm0 = PTILELOADDV renamable $ax, renamable $cx, killed renamable $rdx, 1, killed renamable $rsi, 0, $noreg
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; CHECK-NEXT: renamable $rsi = MOV32ri64 64
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; CHECK-NEXT: renamable $rdx = LEA64r %stack.0, 1, $noreg, 0, $noreg
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; CHECK-NEXT: PTILESTOREDV renamable $ax, renamable $cx, killed renamable $rdx, 1, killed renamable $rsi, 0, $noreg, killed renamable $tmm0
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; CHECK-NEXT: renamable $rsi = MOV32ri64 64
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; CHECK-NEXT: renamable $rdx = LEA64r %stack.0, 1, $noreg, 0, $noreg
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; CHECK-NEXT: renamable $tmm0 = PTILELOADDV renamable $ax, renamable $cx, killed renamable $rdx, 1, killed renamable $rsi, 0, $noreg
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; CHECK-NEXT: renamable $rsi = MOV32ri64 16
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; CHECK-NEXT: renamable $rdx = LEA64r %stack.4, 1, $noreg, 0, $noreg
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; CHECK-NEXT: PTILESTOREDV killed renamable $ax, killed renamable $cx, killed renamable $rdx, 1, killed renamable $rsi, 0, $noreg, killed renamable $tmm0
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; CHECK-NEXT: RET64
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%2:gr64 = COPY $rsi
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%0:gr64 = COPY $rdi
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%1:gr64 = COPY killed %0
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%3:gr64 = COPY killed %2
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%38:gr64_nosp = MOV32ri64 16
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%39:gr64 = LEA64r %stack.2, 1, $noreg, 0, $noreg
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%40:gr16 = MOV16ri 16
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%41:gr16 = MOV16ri 2
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%33:tile = PTILELOADDV %41:gr16, %40:gr16, killed %39, 1, killed %38, 0, $noreg
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%34:gr64_nosp = MOV32ri64 64
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%35:gr64 = LEA64r %stack.1, 1, $noreg, 0, $noreg
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PTILESTOREDV %41:gr16, %40:gr16, killed %35, 1, killed %34, 0, $noreg, %33
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%29:gr64_nosp = MOV32ri64 64
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%30:gr64 = LEA64r %stack.1, 1, $noreg, 0, $noreg
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%25:tile = PTILELOADDV %41:gr16, %40:gr16, killed %30, 1, killed %29, 0, $noreg
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%26:gr64_nosp = MOV32ri64 16
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PTILESTOREDV %41:gr16, %40:gr16, %1, 1, killed %26, 0, $noreg, %25
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ADJCALLSTACKDOWN64 0, 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp
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CALL64pcrel32 &foo, csr_64, implicit $rsp, implicit $ssp, implicit-def $rax
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ADJCALLSTACKUP64 0, 0, implicit-def $rsp, implicit-def $eflags, implicit-def $ssp, implicit $rsp, implicit $ssp
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%24:gr64 = COPY $rax
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MOV64mr %3, 1, $noreg, 0, $noreg, %24
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%22:gr64 = MOV64rm %stack.4, 1, $noreg, 0, $noreg
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%19:gr64_nosp = MOV32ri64 16
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%13:tile = PTILELOADDV %41:gr16, %40:gr16, %22, 1, killed %19, 0, $noreg
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%14:gr64_nosp = MOV32ri64 64
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%15:gr64 = LEA64r %stack.0, 1, $noreg, 0, $noreg
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PTILESTOREDV %41:gr16, %40:gr16, killed %15, 1, killed %14, 0, $noreg, %13
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%9:gr64_nosp = MOV32ri64 64
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%10:gr64 = LEA64r %stack.0, 1, $noreg, 0, $noreg
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%4:tile = PTILELOADDV %41:gr16, %40:gr16, killed %10, 1, killed %9, 0, $noreg
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%5:gr64_nosp = MOV32ri64 16
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%6:gr64 = LEA64r %stack.4, 1, $noreg, 0, $noreg
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PTILESTOREDV %41:gr16, %40:gr16, killed %6, 1, killed %5, 0, $noreg, %4
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RET64
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...
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