derek.holloway
7502bf64a4
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166 lines
7.3 KiB
YAML
166 lines
7.3 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
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# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+lzcnt -run-pass=legalizer %s -o - | FileCheck %s --check-prefixes=CHECK,X64
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# RUN: llc -mtriple=i386-linux-gnu -mattr=+lzcnt -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s 2>%t -o - | FileCheck %s --check-prefixes=CHECK,X86
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# RUN: FileCheck -check-prefix=ERR32 %s < %t
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# ERR32: remark: <unknown>:0:0: unable to legalize instruction: %10:_(s64) = G_CTLZ_ZERO_POISON %4:_(s32) (in function: test_ctlz64)
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# test count leading zeros for s16, s32, and s64
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---
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name: test_ctlz35
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alignment: 16
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legalized: false
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regBankSelected: false
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registers:
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- { id: 0, class: _, preferred-register: '' }
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body: |
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bb.1:
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; X64-LABEL: name: test_ctlz35
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; X64: [[COPY:%[0-9]+]]:_(s64) = COPY $rdx
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; X64-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 34359738367
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; X64-NEXT: [[AND:%[0-9]+]]:_(s64) = G_AND [[COPY]], [[C]]
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; X64-NEXT: [[CTLZ:%[0-9]+]]:_(s64) = G_CTLZ [[AND]](s64)
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; X64-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 29
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; X64-NEXT: [[SUB:%[0-9]+]]:_(s64) = nuw G_SUB [[CTLZ]], [[C1]]
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; X64-NEXT: RET 0, implicit [[SUB]](s64)
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;
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; X86-LABEL: name: test_ctlz35
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; X86: [[COPY:%[0-9]+]]:_(s64) = COPY $rdx
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; X86-NEXT: [[TRUNC:%[0-9]+]]:_(s35) = G_TRUNC [[COPY]](s64)
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; X86-NEXT: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[TRUNC]](s35)
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; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[ZEXT]](s64)
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; X86-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; X86-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV1]](s32), [[C]]
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; X86-NEXT: [[CTLZ:%[0-9]+]]:_(s64) = G_CTLZ [[UV]](s32)
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; X86-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
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; X86-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[CTLZ]], [[C1]]
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; X86-NEXT: [[CTLZ_ZERO_POISON:%[0-9]+]]:_(s64) = G_CTLZ_ZERO_POISON [[UV1]](s32)
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; X86-NEXT: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP]](s1)
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; X86-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[ADD]](s64)
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; X86-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[CTLZ_ZERO_POISON]](s64)
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; X86-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ZEXT1]](s32), [[UV2]], [[UV4]]
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; X86-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[ZEXT1]](s32), [[UV3]], [[UV5]]
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; X86-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)
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; X86-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 29
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; X86-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C2]](s32), [[C]](s32)
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; X86-NEXT: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[MV]](s64)
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; X86-NEXT: [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[MV1]](s64)
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; X86-NEXT: [[USUBO:%[0-9]+]]:_(s32), [[USUBO1:%[0-9]+]]:_(s8) = G_USUBO [[UV6]], [[UV8]]
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; X86-NEXT: [[TRUNC1:%[0-9]+]]:_(s1) = G_TRUNC [[USUBO1]](s8)
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; X86-NEXT: [[ZEXT2:%[0-9]+]]:_(s8) = G_ZEXT [[TRUNC1]](s1)
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; X86-NEXT: [[USUBE:%[0-9]+]]:_(s32), [[USUBE1:%[0-9]+]]:_(s8) = G_USUBE [[UV7]], [[UV9]], [[ZEXT2]]
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; X86-NEXT: [[TRUNC2:%[0-9]+]]:_(s1) = G_TRUNC [[USUBE1]](s8)
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; X86-NEXT: [[MV2:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[USUBO]](s32), [[USUBE]](s32)
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; X86-NEXT: [[TRUNC3:%[0-9]+]]:_(s35) = G_TRUNC [[MV2]](s64)
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; X86-NEXT: [[ZEXT3:%[0-9]+]]:_(s64) = G_ZEXT [[TRUNC3]](s35)
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; X86-NEXT: RET 0, implicit [[ZEXT3]](s64)
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%0(s64) = COPY $rdx
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%1:_(s35) = G_TRUNC %0(s64)
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%2:_(s35) = G_CTLZ %1
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%3:_(s64) = G_ZEXT %2
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RET 0, implicit %3
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...
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---
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name: test_ctlz8
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alignment: 16
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legalized: false
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regBankSelected: false
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registers:
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- { id: 0, class: _, preferred-register: '' }
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- { id: 1, class: _, preferred-register: '' }
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body: |
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bb.1:
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; CHECK-LABEL: name: test_ctlz8
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; CHECK: [[DEF:%[0-9]+]]:_(s8) = IMPLICIT_DEF
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; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s16) = G_ZEXT [[DEF]](s8)
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; CHECK-NEXT: [[CTLZ:%[0-9]+]]:_(s16) = G_CTLZ [[ZEXT]](s16)
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 8
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; CHECK-NEXT: [[SUB:%[0-9]+]]:_(s16) = nuw G_SUB [[CTLZ]], [[C]]
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; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[SUB]](s16)
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s8) = COPY [[TRUNC]](s8)
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; CHECK-NEXT: RET 0, implicit [[COPY]](s8)
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%0:_(s8) = IMPLICIT_DEF
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%1:_(s8) = G_CTLZ %0
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%2:_(s8) = COPY %1(s8)
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RET 0, implicit %2
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...
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---
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name: test_ctlz64
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alignment: 16
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legalized: false
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regBankSelected: false
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registers:
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- { id: 0, class: _, preferred-register: '' }
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- { id: 1, class: _, preferred-register: '' }
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body: |
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bb.1:
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; X64-LABEL: name: test_ctlz64
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; X64: [[DEF:%[0-9]+]]:_(s64) = IMPLICIT_DEF
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; X64-NEXT: [[CTLZ:%[0-9]+]]:_(s64) = G_CTLZ [[DEF]](s64)
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; X64-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[CTLZ]](s64)
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; X64-NEXT: RET 0, implicit [[COPY]](s64)
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;
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; X86-LABEL: name: test_ctlz64
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; X86: [[DEF:%[0-9]+]]:_(s64) = IMPLICIT_DEF
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; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](s64)
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; X86-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; X86-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[UV1]](s32), [[C]]
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; X86-NEXT: [[CTLZ:%[0-9]+]]:_(s64) = G_CTLZ [[UV]](s32)
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; X86-NEXT: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
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; X86-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[CTLZ]], [[C1]]
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; X86-NEXT: [[CTLZ_ZERO_POISON:%[0-9]+]]:_(s64) = G_CTLZ_ZERO_POISON [[UV1]](s32)
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; X86-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[ICMP]](s1)
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; X86-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[ADD]](s64)
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; X86-NEXT: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[CTLZ_ZERO_POISON]](s64)
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; X86-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ZEXT]](s32), [[UV2]], [[UV4]]
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; X86-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[ZEXT]](s32), [[UV3]], [[UV5]]
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; X86-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[SELECT]](s32), [[SELECT1]](s32)
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; X86-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[MV]](s64)
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; X86-NEXT: RET 0, implicit [[COPY]](s64)
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%0:_(s64) = IMPLICIT_DEF
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%1:_(s64) = G_CTLZ %0
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%2:_(s64) = COPY %1(s64)
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RET 0, implicit %2
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...
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---
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name: test_ctlz32
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alignment: 16
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legalized: false
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regBankSelected: false
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registers:
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- { id: 0, class: _, preferred-register: '' }
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- { id: 1, class: _, preferred-register: '' }
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body: |
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bb.1:
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; CHECK-LABEL: name: test_ctlz32
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; CHECK: [[DEF:%[0-9]+]]:_(s32) = IMPLICIT_DEF
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; CHECK-NEXT: [[CTLZ:%[0-9]+]]:_(s32) = G_CTLZ [[DEF]](s32)
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY [[CTLZ]](s32)
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; CHECK-NEXT: RET 0, implicit [[COPY]](s32)
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%0:_(s32) = IMPLICIT_DEF
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%1:_(s32) = G_CTLZ %0
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%2:_(s32) = COPY %1(s32)
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RET 0, implicit %2
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...
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---
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name: test_ctlz16
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alignment: 16
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legalized: false
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regBankSelected: false
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registers:
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- { id: 0, class: _, preferred-register: '' }
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- { id: 1, class: _, preferred-register: '' }
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body: |
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bb.1:
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; CHECK-LABEL: name: test_ctlz16
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; CHECK: [[DEF:%[0-9]+]]:_(s16) = IMPLICIT_DEF
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; CHECK-NEXT: [[CTLZ:%[0-9]+]]:_(s16) = G_CTLZ [[DEF]](s16)
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY [[CTLZ]](s16)
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; CHECK-NEXT: RET 0, implicit [[COPY]](s16)
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%0:_(s16) = IMPLICIT_DEF
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%1:_(s16) = G_CTLZ %0
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%2:_(s16) = COPY %1(s16)
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RET 0, implicit %2
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...
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