TheRock/compiler/amd-llvm/llvm/test/CodeGen/X86/GlobalISel/legalize-sdiv.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,X64
# RUN: llc -mtriple=i686-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,X86

...
---
name:            test_sdiv_i8
tracksRegLiveness: true
body:             |
  bb.1:
    liveins: $edi, $esi

    ; CHECK-LABEL: name: test_sdiv_i8
    ; CHECK: liveins: $edi, $esi
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
    ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi
    ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)
    ; CHECK-NEXT: [[SDIV:%[0-9]+]]:_(s8) = G_SDIV [[TRUNC]], [[TRUNC1]]
    ; CHECK-NEXT: $al = COPY [[SDIV]](s8)
    ; CHECK-NEXT: RET 0, implicit $al
    %2:_(s32) = COPY $edi
    %0:_(s8) = G_TRUNC %2(s32)
    %3:_(s32) = COPY $esi
    %1:_(s8) = G_TRUNC %3(s32)
    %4:_(s8) = G_SDIV %0, %1
    $al = COPY %4(s8)
    RET 0, implicit $al

...
---
name:            test_sdiv_i16
tracksRegLiveness: true
body:             |
  bb.1:
    liveins: $edi, $esi

    ; CHECK-LABEL: name: test_sdiv_i16
    ; CHECK: liveins: $edi, $esi
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
    ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi
    ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
    ; CHECK-NEXT: [[SDIV:%[0-9]+]]:_(s16) = G_SDIV [[TRUNC]], [[TRUNC1]]
    ; CHECK-NEXT: $ax = COPY [[SDIV]](s16)
    ; CHECK-NEXT: RET 0, implicit $ax
    %2:_(s32) = COPY $edi
    %0:_(s16) = G_TRUNC %2(s32)
    %3:_(s32) = COPY $esi
    %1:_(s16) = G_TRUNC %3(s32)
    %4:_(s16) = G_SDIV %0, %1
    $ax = COPY %4(s16)
    RET 0, implicit $ax

...
---
name:            test_sdiv_i32
tracksRegLiveness: true
body:             |
  bb.1:
    liveins: $edi, $esi

    ; CHECK-LABEL: name: test_sdiv_i32
    ; CHECK: liveins: $edi, $esi
    ; CHECK-NEXT: {{  $}}
    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi
    ; CHECK-NEXT: [[SDIV:%[0-9]+]]:_(s32) = G_SDIV [[COPY]], [[COPY1]]
    ; CHECK-NEXT: $eax = COPY [[SDIV]](s32)
    ; CHECK-NEXT: RET 0, implicit $eax
    %0:_(s32) = COPY $edi
    %1:_(s32) = COPY $esi
    %2:_(s32) = G_SDIV %0, %1
    $eax = COPY %2(s32)
    RET 0, implicit $eax

...
---
name:            test_sdiv_i64
tracksRegLiveness: true
body:             |
  bb.1:
    ; X64-LABEL: name: test_sdiv_i64
    ; X64: [[DEF:%[0-9]+]]:_(s64) = IMPLICIT_DEF
    ; X64-NEXT: [[DEF1:%[0-9]+]]:_(s64) = IMPLICIT_DEF
    ; X64-NEXT: [[SDIV:%[0-9]+]]:_(s64) = G_SDIV [[DEF]], [[DEF1]]
    ; X64-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY [[SDIV]](s64)
    ; X64-NEXT: RET 0, implicit [[COPY]](s64)
    ;
    ; X86-LABEL: name: test_sdiv_i64
    ; X86: [[DEF:%[0-9]+]]:_(s64) = IMPLICIT_DEF
    ; X86-NEXT: [[DEF1:%[0-9]+]]:_(s64) = IMPLICIT_DEF
    ; X86-NEXT: ADJCALLSTACKDOWN32 16, 0, 0, implicit-def $esp, implicit-def $eflags, implicit-def $ssp, implicit $esp, implicit $ssp
    ; X86-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF]](s64)
    ; X86-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $esp
    ; X86-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
    ; X86-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s32)
    ; X86-NEXT: G_STORE [[UV]](s32), [[PTR_ADD]](p0) :: (store (s32) into stack, align 1)
    ; X86-NEXT: [[COPY1:%[0-9]+]]:_(p0) = COPY $esp
    ; X86-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
    ; X86-NEXT: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY1]], [[C1]](s32)
    ; X86-NEXT: G_STORE [[UV1]](s32), [[PTR_ADD1]](p0) :: (store (s32) into stack + 4, align 1)
    ; X86-NEXT: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[DEF1]](s64)
    ; X86-NEXT: [[COPY2:%[0-9]+]]:_(p0) = COPY $esp
    ; X86-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 8
    ; X86-NEXT: [[PTR_ADD2:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY2]], [[C2]](s32)
    ; X86-NEXT: G_STORE [[UV2]](s32), [[PTR_ADD2]](p0) :: (store (s32) into stack + 8, align 1)
    ; X86-NEXT: [[COPY3:%[0-9]+]]:_(p0) = COPY $esp
    ; X86-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 12
    ; X86-NEXT: [[PTR_ADD3:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY3]], [[C3]](s32)
    ; X86-NEXT: G_STORE [[UV3]](s32), [[PTR_ADD3]](p0) :: (store (s32) into stack + 12, align 1)
    ; X86-NEXT: CALLpcrel32 &__divdi3, csr_32, implicit $esp, implicit $ssp, implicit-def $eax, implicit-def $edx
    ; X86-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY $eax
    ; X86-NEXT: [[COPY5:%[0-9]+]]:_(s32) = COPY $edx
    ; X86-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY4]](s32), [[COPY5]](s32)
    ; X86-NEXT: ADJCALLSTACKUP32 16, 0, implicit-def $esp, implicit-def $eflags, implicit-def $ssp, implicit $esp, implicit $ssp
    ; X86-NEXT: [[COPY6:%[0-9]+]]:_(s64) = COPY [[MV]](s64)
    ; X86-NEXT: RET 0, implicit [[COPY6]](s64)
    %0:_(s64) = IMPLICIT_DEF
    %1:_(s64) = IMPLICIT_DEF
    %2:_(s64) = G_SDIV %0, %1
    %3:_(s64) = COPY %2(s64)
    RET 0, implicit %3

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