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TheRock/compiler/amd-llvm/llvm/test/CodeGen/X86/GlobalISel/sub-scalar.ll
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139 lines
3.8 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=x86_64-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X64
; RUN: llc -mtriple=i386-linux-gnu -global-isel -verify-machineinstrs < %s -o - | FileCheck %s --check-prefix=X86
define i128 @test_sub_i128(i128 %arg1, i128 %arg2) nounwind {
; X64-LABEL: test_sub_i128:
; X64: # %bb.0:
; X64-NEXT: movq %rdi, %rax
; X64-NEXT: subq %rdx, %rax
; X64-NEXT: setb %dl
; X64-NEXT: negb %dl
; X64-NEXT: sbbq %rcx, %rsi
; X64-NEXT: movq %rsi, %rdx
; X64-NEXT: retq
;
; X86-LABEL: test_sub_i128:
; X86: # %bb.0:
; X86-NEXT: pushl %ebx
; X86-NEXT: pushl %edi
; X86-NEXT: pushl %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
; X86-NEXT: subl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: setb %bl
; X86-NEXT: negb %bl
; X86-NEXT: sbbl {{[0-9]+}}(%esp), %edx
; X86-NEXT: setb %bl
; X86-NEXT: negb %bl
; X86-NEXT: sbbl {{[0-9]+}}(%esp), %esi
; X86-NEXT: setb %bl
; X86-NEXT: negb %bl
; X86-NEXT: sbbl {{[0-9]+}}(%esp), %edi
; X86-NEXT: movl %ecx, (%eax)
; X86-NEXT: movl %edx, 4(%eax)
; X86-NEXT: movl %esi, 8(%eax)
; X86-NEXT: movl %edi, 12(%eax)
; X86-NEXT: popl %esi
; X86-NEXT: popl %edi
; X86-NEXT: popl %ebx
; X86-NEXT: retl
%ret = sub i128 %arg1, %arg2
ret i128 %ret
}
define i64 @test_sub_i64(i64 %arg1, i64 %arg2) {
; X64-LABEL: test_sub_i64:
; X64: # %bb.0:
; X64-NEXT: movq %rdi, %rax
; X64-NEXT: subq %rsi, %rax
; X64-NEXT: retq
;
; X86-LABEL: test_sub_i64:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
; X86-NEXT: setb %cl
; X86-NEXT: negb %cl
; X86-NEXT: sbbl {{[0-9]+}}(%esp), %edx
; X86-NEXT: retl
%ret = sub i64 %arg1, %arg2
ret i64 %ret
}
define i32 @test_sub_i32(i32 %arg1, i32 %arg2) {
; X64-LABEL: test_sub_i32:
; X64: # %bb.0:
; X64-NEXT: movl %edi, %eax
; X64-NEXT: subl %esi, %eax
; X64-NEXT: retq
;
; X86-LABEL: test_sub_i32:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
; X86-NEXT: subl {{[0-9]+}}(%esp), %eax
; X86-NEXT: retl
%ret = sub i32 %arg1, %arg2
ret i32 %ret
}
define i16 @test_sub_i16(i16 %arg1, i16 %arg2) {
; X64-LABEL: test_sub_i16:
; X64: # %bb.0:
; X64-NEXT: movl %edi, %eax
; X64-NEXT: subw %si, %ax
; X64-NEXT: # kill: def $ax killed $ax killed $eax
; X64-NEXT: retq
;
; X86-LABEL: test_sub_i16:
; X86: # %bb.0:
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movzwl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: subw %cx, %ax
; X86-NEXT: # kill: def $ax killed $ax killed $eax
; X86-NEXT: retl
%ret = sub i16 %arg1, %arg2
ret i16 %ret
}
define i8 @test_sub_i8(i8 %arg1, i8 %arg2) {
; X64-LABEL: test_sub_i8:
; X64: # %bb.0:
; X64-NEXT: movl %edi, %eax
; X64-NEXT: subb %sil, %al
; X64-NEXT: # kill: def $al killed $al killed $eax
; X64-NEXT: retq
;
; X86-LABEL: test_sub_i8:
; X86: # %bb.0:
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %eax
; X86-NEXT: movzbl {{[0-9]+}}(%esp), %ecx
; X86-NEXT: subb %cl, %al
; X86-NEXT: # kill: def $al killed $al killed $eax
; X86-NEXT: retl
%ret = sub i8 %arg1, %arg2
ret i8 %ret
}
define i32 @test_sub_i1(i32 %arg1, i32 %arg2) {
; X64-LABEL: test_sub_i1:
; X64: # %bb.0:
; X64-NEXT: xorl %eax, %eax
; X64-NEXT: andl $1, %eax
; X64-NEXT: retq
;
; X86-LABEL: test_sub_i1:
; X86: # %bb.0:
; X86-NEXT: xorl %eax, %eax
; X86-NEXT: andl $1, %eax
; X86-NEXT: retl
%c = icmp eq i32 %arg1, %arg2
%x = sub i1 %c , %c
%ret = zext i1 %x to i32
ret i32 %ret
}