derek.holloway
7502bf64a4
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25 lines
704 B
LLVM
25 lines
704 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=i386-apple-darwin < %s | FileCheck %s
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; PR30841: https://llvm.org/bugs/show_bug.cgi?id=30841
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; Demanded bits analysis must disable nsw/nuw when it makes a
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; simplification to add/sub such as in this case.
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define i8 @PR30841(i64 %argc) {
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; CHECK-LABEL: PR30841:
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; CHECK: ## %bb.0: ## %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: negb %al
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; CHECK-NEXT: ## kill: def $al killed $al killed $eax
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; CHECK-NEXT: retl
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entry:
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%or = or i64 %argc, -4294967296
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br label %end
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end:
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%neg = sub nuw nsw i64 -4294967296, %argc
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%trunc = trunc i64 %neg to i8
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ret i8 %trunc
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}
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