derek.holloway
7502bf64a4
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109 lines
3.3 KiB
LLVM
109 lines
3.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s -mtriple=x86_64 -mattr=+nf -verify-machineinstrs | FileCheck %s
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define void @convertToThreeAddress(ptr %arg, ptr %arg1) {
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; CHECK-LABEL: convertToThreeAddress:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movslq (%rdi), %rax
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; CHECK-NEXT: movslq (%rsi), %rcx
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; CHECK-NEXT: subq %rax, %rcx
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; CHECK-NEXT: leaq 1(%rcx), %rax
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; CHECK-NEXT: js .LBB0_1
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; CHECK-NEXT: .p2align 4
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; CHECK-NEXT: .LBB0_6: # %bb
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: cmpq $1, %rax
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; CHECK-NEXT: jg .LBB0_6
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; CHECK-NEXT: .LBB0_5: # %bb16
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB0_1:
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; CHECK-NEXT: xorl %edx, %edx
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; CHECK-NEXT: .p2align 4
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; CHECK-NEXT: .LBB0_2: # %bb10
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: testb %dl, %dl
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; CHECK-NEXT: je .LBB0_3
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; CHECK-NEXT: # %bb.7: # %bb11
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; CHECK-NEXT: # in Loop: Header=BB0_2 Depth=1
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; CHECK-NEXT: testq %rcx, %rcx
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; CHECK-NEXT: jns .LBB0_2
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; CHECK-NEXT: jmp .LBB0_5
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; CHECK-NEXT: .LBB0_3: # %bb10
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; CHECK-NEXT: xorl %ecx, %ecx
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; CHECK-NEXT: testb %cl, %cl
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; CHECK-NEXT: jne .LBB0_5
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; CHECK-NEXT: .p2align 4
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; CHECK-NEXT: .LBB0_4: # %bb12
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: cmpq $1, %rax
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; CHECK-NEXT: jg .LBB0_4
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; CHECK-NEXT: jmp .LBB0_5
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entry:
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%i = load i32, ptr %arg, align 4
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%i2 = sext i32 %i to i64
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%i3 = load i32, ptr %arg1, align 4
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%i4 = sext i32 %i3 to i64
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%i5 = sub nsw i64 %i4, %i2
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%i6 = add nsw i64 %i5, 1
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%i7 = icmp sgt i64 %i5, -1
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br i1 %i7, label %bb, label %bb10
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bb: ; preds = %bb, %entry
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%i8 = phi i64 [ %i6, %entry ], [ poison, %bb ]
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%i9 = icmp sgt i64 %i8, 1
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br i1 %i9, label %bb, label %bb16
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bb10: ; preds = %bb11, %entry
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switch i32 poison, label %bb16 [
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i32 1, label %bb11
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i32 2, label %bb12
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]
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bb11: ; preds = %bb10
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br i1 %i7, label %bb10, label %bb16
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bb12: ; preds = %bb14, %bb10
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%i13 = phi i64 [ poison, %bb14 ], [ %i6, %bb10 ]
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br label %bb14
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bb14: ; preds = %bb12
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%i15 = icmp sgt i64 %i13, 1
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br i1 %i15, label %bb12, label %bb16
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bb16: ; preds = %bb14, %bb11, %bb10, %bb
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ret void
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}
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; We must not try to replace CMP with AND_NF as it sets no flags
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define void @cmp_peephole_and_nf(i64 %arg0, ptr %ptr1, ptr %ptr2) {
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; CHECK-LABEL: cmp_peephole_and_nf:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: negq %rdi
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; CHECK-NEXT: movl %edi, %eax
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; CHECK-NEXT: {nf} andl $1, %eax
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; CHECK-NEXT: jb .LBB1_2
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; CHECK-NEXT: # %bb.1: # %true
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; CHECK-NEXT: testq %rax, %rax
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; CHECK-NEXT: sete (%rsi)
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; CHECK-NEXT: retq
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; CHECK-NEXT: .LBB1_2: # %false
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; CHECK-NEXT: movq %rdi, (%rsi)
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; CHECK-NEXT: movq %rax, (%rdx)
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; CHECK-NEXT: retq
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entry:
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%sub_flag = sub i64 0, %arg0
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%and_nf = and i64 %sub_flag, 1
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%elim = icmp eq i64 0, %arg0
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br i1 %elim, label %true, label %false
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true:
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%8 = icmp eq i64 %and_nf, 0
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store i1 %8, ptr %ptr1
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ret void
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false:
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store i64 %sub_flag, ptr %ptr1
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store i64 %and_nf, ptr %ptr2
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ret void
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}
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